LONDON — Micron Technologies Inc. (Boise, Idaho) has introduced a multi-chip package (MCP) memory for smart phones, personal media players, and mobile Internet devices (MIDs) that includes a 4-Gbit NAND flash memory die and a 2-Gbit low-power DDR die.
The 4-Gbit NAND flash memory is implemented in 34-nm process technology while the DRAM is implemented in a 50-nm process.
The memory is being sampled to early customers and will go into mass production early in 2010, Micron said. Micron said it can support up to 8-Gbits of NAND and 8-Gbits of LPDDR with the inclusion of additional die but without increasing the package size.
"With Micron's 34-nm 4-Gbit NAND and 50-nm 2-Gbit LPDDR monolithic die used in this package, we are providing customers with the most advanced solution available in NAND-based MCPs," said Eric Spanneut, director of mobile memory marketing, in a statement. "By combining the industry's leading NAND and DRAM processes within our new generation of MCPs, we are able to easily accommodate the shift to high-density NAND devices as the industry progresses toward multi-function mobile devices."
In addition to its MCP portfolio, Micron also offers discrete NAND and LPDRAM parts and NANDcode software.
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