The ScanICE-ARC and NetICE-ARC emulators use the standard JTAG port on ARC Cores' Tangent processor access its on-chip debug facilities. Both include the MetaWare Windows-compatible SeeCode source-level debugger. For JTAG access, the ScanICE uses a PCI bus JTAG controller installed on a PC. The NetICE-ARC uses a LAN-based JTAG controller. The on-chip logic of the Tangent cores enables the user to examine the memory locations without halting the processor. In addition, debug operations can be achieved with no resident code running on the CPU. The ScanICE-ARC and NetICE-ARC are available now.
Corelis
Cerritos, CA
(562) 926-6727
www.corelis.com
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