Michal Bairanzade of ON Semiconductor, describes the basic smart card international specifications and functions, together with the physical interface necessary to handle existing and future cards.

Unlike the old fashioned magnetic stripes credit card, the smartcard is based on a micro controller chip. Consequently, pirating a smart card based credit card is extremely difficult, not to say impossible, and remote payments are no longer risky for both the customer and the supplier.

As well as banking operations, the MCU based card are widely used in other applications : health care, security access, GSM identification, fidelity card, pay per view and set top box decoders being very popular world wide.

The smart card uses the same standard plastic media as magnetic stripe based cards to carry the electronic chip: eight gold platted contacts are used to connect the silicon to the external world. These contacts are arranged according to the ISO7816-1 specification shown in figure 1.

Fig 1: Smart card ISO layout

Whatever be the direction, all the signals must comply to the electrical parameters defined by the ISO7816-3 specifications, including the ESD capability. As a matter of fact, since this device is handled manually, all the pins must be capable to sustain a 4kV ESD stress minimum without favilure.

The smart card are split into two main families:

Asynchronous card : a micro controller and associated firmware is embedded into the plastic card

Synchronous card : a simple memory device is built-in, no data processing being provided

Generally speaking, the asynchronous cards are used for banking and security applications, including the GSM PIN identification, the synchronous one being dedicated to low cost systems like the fidelity or public phone cards.

There are three sub types:
Card Type A: operating voltage Vcc = 5.0V
Card Type B: operating voltage Vcc = 3.0V
Card Type C: operating voltage Vcc = 1.8V (new cards )

Since there is no external and visible way to identify the card a system is dealing with, it is the interface responsibility to differentiate the card, handling the chip properly.

The main purpose of the interface is two fold:

• To provide the right power supply voltage to the card, whatever be the external power source value.
• To translate the voltage levels necessaries to connect the card ( pins C1 to C8 ) to the external controller.

On the other hand, the interface shall support the ISO7816-3 and EMV specifications, particularly the Power Up and Power Down sequences.

Table 1

Pin	Name	Function	Signal Direction	Async.	Synchronous
C1	Vcc	Power Supply	Analog Input	Yes	Yes
C2	CLK	Clock	Digital Input	Yes	Yes
C3	RST	Reset	Digital Input	Yes	Yes
C4	C4	Digital	Input	No	Yes
C5	GND	Analog & Digital		Yes	Yes
C6	Vpp	Programming Voltage	Analog Input	No	Card Only <1986
C7	I/O	Communication	Analog Bi-directional	Yes	Yes
C8	C8	Digital	Input	No	Yes

A typical block diagram of a smart card reader is shown in figure 2.

Fig 2: Typical smart card/microcontroller interface

Since the cards can have different supply voltage, the interface has to accommodate such voltages and can either re-route existing power supplies, or generate this supply locally on chip. The first alternative was used during the beginning of the smart card industry, but integrated circuit is the preferred solution for all the modern readers. Consequently, a DC/DC converter must be included in the silicon chip, and two basic structure can be used :

• Charge pump converter : the input supply voltage is doubled by an external fly capacitor, this voltage being smoothed and regulated by a built-in low drop out voltage regulation stage.
• Switch mode converter : the energy is taken from the supply voltage by an external inductor associated to a voltage regulation stage.

Although the charge pump might be considered the lower cost solution at a first glance, it is not very efficient and portable applications have difficulties using this structure.

The inductor based system makes profit of the high switch mode converter effectiveness and can accommodate any range of input voltage over the ISO specified power supplies (see table 2). It is suitable to handle either step-up or step-down structure without downgrading neither the voltage regulation nor the ripple.

Table 2: ISO7816-3/EMV smart card power supply specifications

Vcc	Continuous Output Current	Pulsed Output Current	Maximum Limited Output Current	Vcc Ripple	Vcc Tolerance
1.80V	30mA	70mA	200mA	+/-250mV	1.65 - 3.25V
3.0V	55mA	100mA	200mA	+/-250mA	2.70 - 3.3V
5.0V	65mA	100mA	200mA	+/-250mA	4.7 - 5.25V

Leaving aside the micro controller, the smart card interface can be split into six blocks as depicted in figure 3. The MCU controls the chip by means of a set of digital lines represented on the left hand side of the picture. The industrial standard SPI protocol has been used because it is a fast and easy to implement structure from both hardware and software stand point.

Fig 3: Block diagram of smart card interface

The pins on the right hand side yields all the electrical connections necessaries to handle any type of smart card. On the other hand, the software embedded into the MCU can run either a pooling or an interrupt mode of operation to sense the insertion or extraction of the card. When an interrupt mode is in use, an extra pin DET serves as a card detection.

The input voltage monitoring block monitors the input power supply voltage, providing logic signals to the rest of the integrated circuit. As a matter of fact, the system is enable only when the supply voltage is within the specified operating range, avoiding the risk of uncontrolled transactions with the card. The Power On Reset and the Power Down Sequence take place in this block as well.

The digital controls block reads the logic signals provided by the external micro controller and activate the functions appropriately. The data contained in the MOSI byte yield the operating conditions for a given smart card. Basically , this conditions are:

Output voltage
Clock division ratio
Card detection mode
RESET bit to the card
Power Up or Power Sequence

Moreover, the ON semiconductor chip includes the capability to connect several chip in a bank, sharing a common digital and I/O bus. Such a connection save the extra digital lines, thus PCB space and costs, mandatory when the system operate in a full parallel mode.

Since the CLOCK is used by Asynchronous card, the pin must be capable to receive high frequency signal ( up to 40MHz is common ) coming from either low or high impedance source.

The DC/DC converter, based on a step-up/step-down structure, is capable to generate the output power defined by the EMV /ISO specifications. The most critical points are:

• lvoltage ripple below 100mV, whatever be the input / output voltages and output power demand
• DC output current over the full temperature range
• Capability to continuously support any short circuit without any damage
• Turn off in less than 500 ns

To achieve these parameters, one must use low ESR capacitors to built the input and output filter. The low cost electrolytic capacitors, or the tantalum ones, are not useable in these applications and ceramic X7R or X5R are highly recommended. Figure 4 illustrates the ripple difference between two type of capacitors.

Fig 4: Typical output voltage ripple

Obviously, the structure of the DC/DC converter plays a paramount role in these achievements, but high cares must be observed at printed circuit lay out design as well.

The digital output pins are connected straightforward to the card and must obey the EMV / ISO specifications.

The keys parameters are:

• in any case, the I/O line shall not force more than 500 µA on the card input pin
• the digital signals, CLK excepted, shall have a built-in short circuit current limited to 15 mA
• the output clock shall operate up to 20 MHz, the rise and fall time being < 8% of the period
• the pins shall be capable to endure a 4kV ESD without damage

On the other hand, the interface must have provisions to support the Power Down Sequence, particularly when the card is extracted randomly. This sequence is defined by both EMV and ISO7816-3 as depicted in figure 5:

Fig 5: ISO7816-3 power down sequence

The waveforms have been captured on the NCN6001 demo board, the card being manually extraction while no transaction was on going.

Since the input clock provided by the external MPU can be largely above the maximum rating of a given card ( the EMV specifies a 5MHz max for banking operations), the system must accommodate this signal in order to complete the transaction. The high end integrated interface circuit has a built-in clock divider making possible the clock arrangement between the source and the card. The waveforms shown Figure 6 illustrate the NCN6001 operation, the programming being achieved on the fly, limiting the latency between the order and its execution.

Fig 6: NCN6001 clock division sequence

The bi-directional I/O line is critical since it carries the data transaction between the external controller and the smart card. The ISO7816-3 and EMV documents both carefully specify the electrical and time related parameters. This line being bi-directional, the interface must provide an analog link to adapt any type of micro controller to the card. As a matter of fact, beside the input gate, the card terminal is always an open drain output circuit with limited 500 µA current drawn capability. There is no such a standard pin on the microcontroller side and standard logic circuit cannot be used if the integrated circuit interface is intended to be used on a wide range of MCU applications.

Figure 7 illustrates a technique suitable to drive any smart card I/O line whatever be the micro controller.

Fig 7: Typical I/O line driver

The idle state of the I/O line is a high ( voltage = Vcc of the card ), the signal being pull to zero when a transaction takes place. Generally speaking, the critical parameters are :

• maximum rise and fall time of the signal under worst case conditions ( low Vcc / large stray capacitor )
• limited output current when the card pulls the line to zero
• voltage spikes free idle line

On the other, the current shall be limited to 15 mA whatever be the short circuit applied on one side of the line.

The card detection analog input block provides the bias of the pin ( powered by the input supply ) together with the detection of the logic state of the external switch. The internal circuit is designed to accommodate either Normally Open or Normally Closed switch, depending upon the programming defined by the micro controller. Moreover, the chip includes a digital filter to avoid any noise entering the interface, hence eliminates the risk of uncontrolled interrupt to the MCU. To reduce the standby current absorbed by this pin, the bias current is extremely low and cares must be observed to avoid leakage from this line to ground.

The card replies to an ATR and cannot send any data on the I/O line before such a command has been issued by the micro controller. The ISO7816-3 to ISO7816-10 specify the digital format supported by the card together with the format of the protocol used during theses transactions. When a card is inserted in the reader, the software must first determine what kind of card is connected and what is the type of protocol supported by the card. This is achieved by the ATR issued by the MCU and one of two possible protocols will be provided :

T0: the data on the I/O line will be arranged byte by byte.
T1: the data on the I/O line will be arranged by packet of bytes.

The ATR also gives a bunch of information necessary to read/write to the card during the rest of the transaction:

• operating voltage
• maximum current absorbed by the card
• data direct or inverse convention (MSB or LSB bit first in the byte)

With more than 3 billion cards manufactured each year at time of printing this paper, the smart card business is the key to the twenty first century e-commerce. However, the smart card readers must be carefully designed to make the systems capable to provide secure and easy transactions, particularly for the banking operation. Thanks to the latest development of the encryption techniques, all the sensitive applications can be operated with a very high level of security for the data transaction.

On the other hand, the high level of integration of the electronic interface circuit makes this task relatively easy and safe for the designer. Moreover, the semiconductor industry develops new set of chips to support the full range of applications, including multiple interfaces.

The next smart card interface will integrate the micro controller and the analog interface in a single silicon die: the card reader will be a simple peripheral attached to a PC with the standard USB port.

REFERENCES

ISO7816-1 Identification Cards- Integrated circuits card with contacts. Part 1 : Physical characteristics

ISO7816-2 Identification Cards- Integrated circuits card with contacts. Part 2: Dimensions and location of the contacts

ISO7816-3 Identification Cards- Integrated circuits card with contacts. Part 3: Electronic signals and transmission protocols

ISO7816-10 Identification Cards- Integrated circuits card with contacts. Part 10 : C4 and C8 specifications

AND8073/D Using The NCN6000 Smart Card Interface

ABBREVIATIONS

L1a , L1b	DC/DC external inductor
Cout	Output Capacitor
CRD_VCC	Card Power Supply Input
VCC	MPU Power Supply Voltage
Icc	Current at card VCC pin
Class A	5V Smart Card
Class B	3V Smart Card
Class C	1.8V Smart Card
CS	Chip Select
CRD_VCC	Interface IC Card Power Supply Line
CRD_CLK	Interface IC Card Clock Input
CRD_RST	Interface IC Card RESET Input
CRD_IO	Interface IC Card Data link
CRD_DET	Card insertion / extraction detection
ATR	Answer To Request
EMV	Europay, Master Card, Visa
ISO	International Standards Organisation
Vbat	DC/DC Power Input Voltage
EN_RPU	Enable/Disable internal pull up
VCC	Digital Input Supply
MOSI	Master Out Slave In ( SPI Protocol )
MISO	Master In Slave Out ( SPI Protocol )
SPI	Serial Protocol Interface
T0	Smart Card Data transfer procedure by bytes
T1	Smart Card Data transfer procedure by strings
ESD	Electrical Static Discharge

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Published in Embedded Systems (Europe) June 2002