By Dr. Finbarr Moynihan
Dr. Finbarr Moynihan, of Analog Devices describes how changingdemands for embedded control have lead to the development of single
chip devices based on core competencies in digital signal processing.
In recent years, there has been a major adoption of DSP technology
in a variety of embedded control applications. Typical industrial
applications include high-performance servo drives in
applications like machine tools (milling machines, CNCs), robotics
(in automobile assembly lines) and production machines for printing,
packaging, textile, weaving, semiconductor wafer handling, bottling,
sorting, and other automated production applications. Additional
industrial-control applications that require DSP performance include
uninterruptible power supplies (UPS), high-end switched-mode power
supplies (SMPS), and general-purpose variable-speed drives in cranes,
elevators, and process automation equipment.
Common requirements
All of these seemingly disparate applications share a common set
of requirements: the controller regulates a switching power-converter
based on feedback measurements of currents and voltages, to regulate
the power flow to the motor or end system. Additionally, all modern,
high-performance motor drives require high-accuracy speed and
position feedback information from the motor shaft. This information
is required for a variety of different needs within the overall
control structure. Relatively low-accuracy position information is
needed for correct commutation of the motor currents in a three-phase
machine; speed and position information, accurate to 8 to 10bits is
generally sufficient for these tasks.
However, for closed-loop speed and position control, resolutions
of up to 24bits on the rotor position are required for the most
demanding applications.
To sustain their competitive advantages, developers and
manufacturers of these high-performance systems are continuously
increasing the precision, closed-loop controller bandwidths, and
system reliability, while reducing overall system cost.
In UPS applications, the ability to achieve higher closed-loop
bandwidths allows the generation of higher quality (less harmonic
distortion) output voltages that are more immune to typical transient
and distortion phenomenon found on the input ac mains. Similar
criteria apply in servo systems in which overall system bandwidth is
often a key selling point to help differentiate products from various
vendors.
Advances in power semiconductor technology have enabled very high
switching frequencies often in the tens of kilohertz
&endash;to be achieved in the power converter topologies. As
such, controller period (during which all of the mathematically
intensive closed-loop control calculations must be performed) has
been reduced to tens of microseconds. Today, typical servo drive
update rates &endash; a critical measure of performance and often a
key marketing differentiator between servo drives &endash; have been
reduced to 50ms or less. It is generally accepted that traditional
microcontrollers (MCU) lack the sheer computational capability to
execute all of the necessary control functions in the allowed
time.
The availability of on-chip hardware multipliers and architectures
optimized for intensive mathematical calculation has propelled the
adoption of DSP technology for these applications. Historically,
these high-end, embedded control systems, have been primarily defined
by their performance criteria and often times cost was a secondary
concern.
Discrete solutions
Many manufacturers have developed discrete solutions to implement
the control function of these embedded control applications. The
total solution often comprises the DSP core and associated program
and data memory, high-resolution (today 12bit is the accepted norm
for these applications, with more demanding applications moving to
14bit), simultaneous-sampling, analog-to-digital conversion (for
measurement of the feedback signals) and a variety of peripheral
functions (often implemented with an FPGA device) for the generation
of pulse-width modulation (PWM) signals to drive the power converter
and interfaces to various rotor-position sensors.
Many critical application and technology factors must be
considered when developing an integrated solution that does not
compromise the overall system performance. For example, the
integration of digital peripheral functions (such as PWM generation,
encoder interface units, and serial communications ports) with the
DSP core presents no significant technology challenges, since both
are well adapted to standard digital CMOS processes.
A thorough applications knowledge is required in the specification
of these peripheral functions if they are going to meet the needs of
the end users. For example, a basic incremental encoder interface
unit can be developed as a simple quadrature up/down counter.
Unfortunately, this basic functionality does not provide any of the
more advanced features that are required in real-world applications,
such as flexible data latching of zero marker events, programmable
filtering of encoder input signals for high-noise immunity and the
accurate measurement of the time between encoder events for precise
speed calculation. If sufficient care is not taken in the
specification of these advanced features of the integrated peripheral
functions, the user may be forced to add external logic (such as an
FPGA device) to obtain the required performance. Clearly the overall
benefits of the purported integration are lost in this situation.
Integrated solutions
Besides cost savings, there are numerous advantages to a fully
integrated solution. In particular, a single-chip solution that
combines the required mixed-signal integration simplifies the overall
ease of use and cost of ownership for the customer &endash;it
is easier to source a single device from a single supplier and
integrate the device into a control board than it is to deal with
multiple vendors/suppliers.
For many applications, developers of embedded control applications
are using over-sampling and estimation techniques to extend the
overall precision of the systems beyond the seemingly physical limits
of ADC bits and DSP core bit width.
For example, a software implementation of a rotor position
feedback, say a resolver to digital conversion, can achieve 16 to
18bit performance by acquiring the data using 12bit resolution ADCs
and applying over-sampling methodologies. These techniques require
high data-sampling rates; often the design challenge is in
maintaining a high data throughput to the DSP core for processing.
One approach is to integrate the ADC core and use direct memory
access (DMA) channels to continually feed data from the ADC to the
memory of the DSP core, balancing the computational capabilities of
the core with the sampling rate of the ADC.
In addition, a single-chip solution keeps all of the
high-frequency data lines from the ADC to the DSP on-chip, thereby
reducing overall system-power consumption and easing EMI issues with
the system design.
The integration of the mixed-signal components of the overall
system&endash; analog-to-digital conversion, precision voltage
references, power-on-reset circuits, on-chip amplifiers, etc.
&endash; with the DSP core presents many interesting technology and
application challenges. In many respects, the desire for integration
of powerful DSP cores with high-sampling rate, high-resolution ADCs
presents a host of conflicting technological issues.
Software development
On the one hand, developers of embedded control solutions
recognize that one of the largest aspects of the overall project
development budget is the software development. As such, the choice
of a particular processor architecture for an embedded control design
may depend on the quality and availability of good hardware and
software development tools as much as the actual features of the
particular processor device.
Software developers want to write the majority (if not all) of
their controller code in higher-level languages such as C/C++. Often,
very time critical tasks may still need to be optimized, either by
careful use of the C language construction, the insertion of assembly
language modules, or the use of library functions.
The ability to quickly identify the areas within the controller
code that require optimizations and manage such optimizations offer a
powerful tool for the targeted reduction of the overall software
development effort. These software tools issues are pushing the
performance requirements of the DSP core, such that ever higher
instruction rates (or MIPS, millions of instructions per second),
larger amounts of on-chip memory, larger addressable amounts of
off-chip memory and special architectural features of the core to
accommodate programming in C/C++ are required.
By definition, these requirements are pushing the use of the
latest in DSP core technology built on low geometry CMOS processes,
which operate at lower voltages and enable high-frequency
capabilities (to hundreds of MHz today).
On the other hand, the desire for very high-performance ADC
technology, with resolutions up to 14bits and fast sample rates (up
to many MSPS, million samples per second) is made increasingly
difficult as process geometry shrinks. With reduced operating
voltages, and subsequent lower signal voltage swings, the ability to
maintain the required signal-to-noise ratio (SNR) becomes
increasingly challenging.
In addition, the close proximity of high-frequency clock rates in
the digital design presents its own set of design challenges in
effectively isolating the precision analog circuits from the noisy
digital circuits and ensuring that there is no correlation or
cross-talk from the digital domain to the analog domain.
Analog Devices has been exploiting its competencies in DSP and
high-performance analog to create single-chip, embedded controller
solutions that provide very high resolution ADC performance.
In particular, the ADMC300 integrates 5 channels of 12bit, SD
(sigma-delta) ADC with a 25 MIPS DSP core. The ADMC401, introduced in
1999, provides 8-channel, 12bit ADC performance at very high sample
rates of 6MSPS, with the same DSP core. Both of these devices have
gained acceptance for many of today's embedded control
applications.
Mixed-signal family
To meet the future needs of embedded control applications, and to
target a variety of emerging applications, ADI has introduced a
family of mixed-signal DSPs, called the ADSP-219xx. The first two
members of this family are the ADSP-21990 and the ADSP-21991. These
products combine an ADSP-219x DSP core, multi-channel,
high-resolution ADC, and a selection of embedded control peripherals.
As such, these products can be viewed as the merging of various
technologies and competencies from with ADI &endash; the latest DSP
cores (ADSP-219x) with the highest performance ADCs and embedded
control intellectual property contained in our peripheral designs
(leveraged and enhanced from the ADMC family of
devices)&endash; to form a new class of mixed-signal DSPs.
Mixed signal DSP with embedded control
peripherals
In particular, the ADSP-21990 offers 150MIPS, 16bit, 219x DSP
core, 4K words of on-chip program memory, 4K words of on-chip data
memory, and an external addressable memory space of 1Mwords (20
address lines). The mixed-signal integration consists of an 8channel,
14bit, 18.75MSPS ADC core (with dual sample-and-hold amplifiers for
simultaneous sampling needs), precision on-chip voltage reference,
and an integrated power-on-reset (POR) circuit.
The embedded control peripherals include a three-phase PWM
generation unit (for control of power switching converters), 32bit
incremental encoder interface (with noise filtering, flexible speed
measurement hardware, a flexible reset, and latching modes), dual
auxiliary PWM outputs (for control of secondary switching circuits
such as power factor corrected front-end converters or dynamic dc
link braking circuits) and a watchdog timer.
General-purpose peripherals are also provided and include three
32bit, general-purpose timers, a 16bit general-purpose I/O port, a
memory DMA controller, and a flexible, peripheral interrupt
controller. Two high-speed communications ports are included a
synchronous serial port (SPORT) and a standard SPI port.
The devices are supported by ADI's CROSSCORE development tools. In
particular, the development tools suite consists of the VisualDSP++
integrated software development environment that provides an
assembler, C/C++ compiler, VisualDSP++ Kernel (VDK), advanced
plotting tools, and statistical profiling to help quickly identify
programming bottlenecks and reduce development time.
Hardware development tools consist of a low-cost EZ-KIT Lite
evaluation platform. Functionality of the EZ-KIT Lite can be extended
by the addition of JTAG in-circuit emulation (ICE) that permits full
control for software debugging. Both PCI (Summit-ICE) and USB
(Apex-ICE) versions of the emulator are supported.
Published in Embedded Systems (Europe) September
2002