Qiang Zheng

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Qiang Zheng

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    • I have a question with this circuit design. How can PME-51 distinguish the instruction AJMP from FJMP(ACALL from FCALL), since they have the same opcode and PME-51 needs to read the opcode first? If PME-51 cannot find the difference, how can it know the following third byte is the lowest 8-bit part of a 19-bit address? Why cannot PME-51 treat this byte as the opcode of the following instruction? Or is it possible that PME-51 will not accept AJMP(ACALL) with 11-bit address, it always only accept 19-bit address? Therefore 2KB page jumping function will be lost. On the other hand, since there is a reserved opcode 0xA5 not used by 8051, is it possible for PME-51 to use it as the opcode of far jump? Also, the following bytes more than 2 (access memory larger than 64K) can be variable. 3 bytes means access of 16MB memory, 4 bytes means access of 4GB... as long as PME-51 can offer such width address bus and enough large XAR stack to hold the high parts of the addresses,XAR to hold the high part of current execution address, leaves the low 2-bytes part to 8051, and give 8051 the opcode FJMP(FCALL). So AJMP, LJMP, FJMP(ACALL, LCALL, FCALL) are all available for this "combined memory enhancement 8051 processor". The key point is to redesign a suitable circuit of PME-51.