achimnohl

• 09.27.2012
• Virtually broken

Dear Przemek, thanks a lot for sharing those interesting stories! Best regards, Achim

• 07.19.2011
• Synopsys gathers Virtio, VaST, and CoWare into Virtualizer

I agree that tools are becoming more application specific. In fact, Virtualizer enables VPs to be made aware of the specific characteristics of user software stacks, and associated software development tasks. For example, Virtualizer software analysis can be made OS-aware so that the user understands the system behavior at a much higher level of abstraction than just tracing functions. The same idea can be applied to the full software stack layered upon the OS kernel, and across multiple cores. As a result, Virtualizer analysis is aware of the fact that the CPU is running Android and clearly visualizes important data such as the Android software logging, Java/native code interfacing, and Java interpreter at the right abstraction level. In a multi-million line software stack, the challenge is to understand the relation between the user/environment-initiated activities and the resulting HW/SW behavior. Simple hardware signal tracing and function tracing are far too detailed to understand this. Because every software stack is different, Virtualizer provides APIs that allow the user to easily and stepwise tailor the analysis to what is needed. We have example analysis kits for Android Gingerbread 2.3.4 as well as Linux 2.6.x and others, to help guide them. Achim Nohl, Solution Architect, Synopsys

• 07.19.2011
• Synopsys gathers Virtio, VaST, and CoWare into Virtualizer

Virtualizer analysis tools cover the whole spectrum from software analysis to platform hardware analysis. Each analysis view is tailored to a specific purpose, such as software analysis, HW/SW interface analysis, memory analysis, power analysis and more. All data is stored in a single database so that any type of analysis can be easily correlated. Analysis instrumentation is based on industry standard TLM-2.0 interfaces and the open SystemC Modeling Library (SCML2) APIs from Synopsys. This makes modeling much easier and efficient through the concept of modeling objects and reusable design patterns. Moreover, the TLM processor models in our library are further instrumented to expose IP-specific performance counters and other data for debug and performance analysis. The modeler can also use our instrumentation framework to visualize any relevant information from their VP - and its operating environment - in combination with Virtualizer analysis views. For example, they can create a power model of a modem which is driven by software but does not exist as a functional model. (We recently did a webinar on this topic).

• 07.19.2011
• Synopsys gathers Virtio, VaST, and CoWare into Virtualizer

Hi Ron, thanks for the write-up on Virtualizer. I saw you had some questions so here is a brief reply for your readers. They can contact us for more details. TLM library availability is definitely a strength for Virtualizer. Virtualizer supports a broad model library and reference design portfolio with more than 500 models available from Synopsys. These models include processor cores, interconnects, peripherals as well as complete reference designs running entire software stacks. Synopsys provides support for a wide range of popular processor architectures including ARM, MIPS, PowerPC, SH, V850, Tensilica, DSPs as well as peripheral IP models from DesignWare and ARM PrimeCell. In addition an extensive set of APIs enable developers to incorporate their own models for simulation, debugging and analysis in Virtualizer. Most models are SystemC TLM-2.0, however Virtualizer supports additional TLM protocols as well, including AMBA based, OCP-IP based, and customer-specific TLMs. Multicore software debug and analysis with Virtualizer is non-intrusive. In order to manage platforms with many CPU subsystems from an SW developer perspective, we provide a dedicated debug server that allows orchestration of 3rd party debuggers that can be attached to the CPUs in the virtual prototype (VP). Thus, all debuggers can co-operate (rather than freezing) in scenarios where multiple software entities need to be debugged at the same time. Furthermore, we provide a central debug and control cockpit that allows the global control and inspection of the entire VP. Complementing SW debuggers which are CPU specific, this provides a platform level view and exposes all relevant registers/signals/memories and disassembly of all CPUs. Virtualizer enables this out of the box. The user doesn’t have to add any instrumentation to their code, they can run the same unmodified binaries on the VP that will run on the actual hardware. Achim Nohl, Solution Architect, Synopsys