Morello serves as a real-world test platform for deployment of more secure hardware architecture in processors of the future. It uses CHERI to extend conventional hardware ISAs with new architectural features to enable fine-grained memory protection and scalable software compartmentalization.

The rise of network softwarization and cloud has encouraged a more diverse supply chain and consequently, the zero-trust approach is discussed as a possible way to address the cybersecurity risks that comes with it.

Generating encryption keys using quantum mechanics is a major part of the solving the IoT security challenge. This can harness the true unpredictability of quantum mechanics to produce encryption keys that are near-perfectly unpredictable and protected from adversaries.

Choosing the right tool to measure low power leads to more accurate power validation, which, in turn, enhances product performance. In an increasingly connected world, electronic devices are becoming…

New interposer brings CrossSync PHY capability to the CEM specification form factor at the full PCIe 5.0 rate of 32 GT/s. It includes probing points for reference clock, sideband signal, and power rail voltage and current monitoring, in addition to data signals for the protocol analyzer.

Xilinx said its new Alveo U55C card is purpose-built for HPC and big data workloads, offering the highest compute density and HBM capacity in the Alveo accelerator portfolio.