One of the great challenges of the next decade will be the integration of information technologies and health care. In this case the quality and cost of services for the patients and health care providers must benefit from reduced misdiagnoses and by providing greater access to advanced modalities for more patients.
In addition, wearable biomedical devices are used in inpatient, outpatient, and at home e-Patient care that must constantly monitor the patient's biomedical and physiological signals 24/7. Several biomedical applications require execution of digital signal, image, and video processing algorithms.
For instance, ultrasound and seizure detection both contain different filtering, FFT blocks, up/down sampling and windowing techniques that can be parallelized on DSP processors. On the other hand, such portable devices have extremely small budgets for size and power, which currently use application specific integrated circuits (ASIC) or highly custom SoCs.
This paper presents a programmable many-core platform containing 64 cores routed in a hierarchical network tor biomedical signal processing applications. Individual core processors are based on a RISC architecture with DSP enhancement blocks.
Given the number of conditional program loops in DSP applications such as FFT, additional hardware blocks are added that operate in parallel to each core processor. The two blocks calculate the FFT input addresses and determine if a conditional loop is necessary.
Performingthese operations in parallel to the main processor greatly reduces the time to completion for a DSP application. Each processor is implemented in 65 nm CMOS using standard cell Iibraries. The 64-core platform occupies 19.51 mm and runs at 1.18 GHz at 1 V.
For demonstration, Electroencephalogram (EEG) seizure detection and analysis and uItrasound spectral doppler are mapped onto the cores. The seizure detection and analysis algorithm utilizes 60 processors and takes 890 ns to execute. Spectral doppler utilizes 29 processors and takes 715 ns to run.
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