ADAS processors integrate functional safety MCU

LAS VEGAS — Texas Instruments has introduced ADAS and gateway processors — TDA4VM and DRA829V — built on TI’s latest Jacinto platform and designed to enable mass-market ADAS vehicles.

This move underscores the decision by several leading car OEMs to scale back from an original commitment to pioneer fully autonomous vehicles.

In a recent interview with EE Times, Curt Moore, general manager and product line manager for Jacinto processors, acknowledged that TI, too, faced the dilemma of “where we want to invest our time” for its next-generation automotive processors. TI’s emphatic answer was to design auto-grade processors that can address “edge, safety, and security,” but zero in on “semiconductor affordability and accessibility.”

“We wanted to develop automotive processors that are scalable and applicable to a wider set of vehicles including low cost and affordable cars for younger drivers, and those with low-income,” explained Moore.

ADAS and Gateway processors

TDA4VM processors are for ADAS, while DRA829V processors are developed for gateway systems “meeting with all the plumbing requirements,” noted Moore. They include specialized on-chip accelerators, according to TI, to expedite data-intensive tasks.

Both TDA4VM and DRA829V processors also incorporate a functional safety microcontroller so that OEMs and Tier-1 suppliers can “support both ASIL-D safety-critical tasks and convenience features with one chip,” said TI.

Perhaps, most important, both ADAS and gateway processors share one software platform. Moore said, “Developers can use the same software base from high-end to low-end vehicles.”

Asked about TI’s two new processors, Phil Magney, founder and principal at VSI Labs, told EE Times, “I see them as great companions as both are necessary to support the latest trends in software-defined architectures. Together, these processors can take care of the heavy processing requirements of automated driving.”

Magney explained, “The environmental modeling gets very processor intensive when you consider all the inputs necessary to support the task in real time. Further, you need the data capacities, timing, and synchronization of all the sensor data. On top of this, you need safety and security, which are built into these chips.”

The right level of autonomy?

With the new processors, TI hopes to enable the right level of autonomy in new vehicles.

Calling Level 4 and Level 5 cars “still in development stage,” Moore pointed out “corner cases” that fully autonomous vehicles have yet to solve and “well-defined use cases” [and operational design domains] that must be spelled out for higher-level autonomous vehicles. Given these challenges to full autonomy, Moore said, “This will be a slow journey” from the current Level 2 and Level 2+ vehicles.

TI, however, isn’t swearing off higher-level ADAS functions. Indeed, TI’s new ADAS processor, TDA4VM, is designed to achieve much better visibility at speeds necessary for on-chip analytics.

Specifically, the TDA4VM supports high-resolution 8-megapixel (MP) cameras that see farther, possibly even in fog and rain. TDA4VM processors can also simultaneously operate four to six 3 MP cameras.

Sameer Wasson, vice president and general manager of TI’s processor business unit, told EE Times that the new ADAS processors are also capable of fusing other sensors — including radar, Lidar, and ultrasonic. “Our goal is to enable carmakers and Tier 1’s to develop scalable but practical cars.”


TI’s new ADAS processor TDA4VM is not only highly integrated but also capable of fusing a variety of sensory data. (Source: TI)

Magney believes the TDA4VM is scalable in a sense that it can “handle full 360 situational awareness for high-end ADAS or automated driving applications.”

Beyond the ADAS processor’s ability to efficiently manage multilevel processing in real time, the key is that it can do the job within the system’s power budget. “Our new processors execute high-performance ADAS operations using just 5 to 20 W of power, eliminating the need for active cooling,” TI claimed.

Deep learning

TI also claimed that the latest Jacinto platform brings enhanced deep learning capabilities. Noting that the platform offers full programmability, Moore said, if OEMs or Tier 1’s plan to set up their own vision/camera/sensor fusion, the SoC allows their own perception.

A few analysts, however, are frustrated with the scant details TI has provided for its ADAS processors. “Now TI says the TDA4VM can handle deep learning, but they don’t disclose any specs or details, let alone its performance,” said Mike Demler, a senior analyst at The Linley Group. Asked how TDA4VM might fare against Intel/Mobileye’s EyeQ chips, “Now TI mention AEB (automatic emergency braking) and self-parking, which require at least [Mobileye’s] EyeQ3 capabilities. But again… how much performance? We don’t know.”

VSI Labs’ Magney also noted that it won’t be easy to compare TDA4VM with Mobileye’s EyeQ chips. He noted, “Mobileye’s tight integration of processor and algorithms makes them a strong incumbent in the field.” TI’s edge might be that “as the industry moves from ADAS to automated driving, OEMs will desire more freedom to develop their own algorithms.”

Software-defined car

TI, too, is keeping in check carmakers’ desire to enable over-the-air (OTA) updates — with a goal to make software-defined cars possible.

“OTA isn’t generally possible without giving architecture upgrades inside a car,” observed Moore. Given the criticality of secure connectivity necessary for software updates, “I don’t see car OEMs going for OTA without a gateway processor or with just a legacy dumb MCU,” he added.

To that end, Moore described TI’s DRA829V processor as offering carmakers “a huge step function in the beginning of their journey to secure OTA.”

TI noted that new gateway processors “manage higher volumes of data and support evolving requirements for autonomy and enhanced connectivity.”


TI claims it is the first to integrate the PCIe and GbE/TSN into its gateway processor. (Source: TI)

TI also touted the DRA829V processor as “the first in the industry to incorporate a PCIe switch on-chip in addition to integrating an eight-port gigabit TSN-enabled Ethernet switch for faster high-performance computing functions and communications throughout the car.”

So, how big a deal is it for TI to integrate the PCIe and GbE/TSN into its gateway processor DRA829V?

Demler said, “Looks like it has an 8-port switch, which is more than what’s offered by NXP’s recently announced S32G’s 2x switch.” But, he added, the DRA829V processors don’t exactly match up with NXP’s S32G which was designed as a full-fledged network processor.

But on a higher level, both NXP and TI are addressing the same trends in automotive architecture, Magney summed up. “You have massive amounts of data to handle and you need the plumbing to support that.”

Availability

TI’s Moore noted that both TDA4VM and DRA829V samples have been already in the hands of a large number of customers since May.

According to TI, “Developers can get started immediately with Jacinto 7 processors development kits and buy the new TDA4VMXEVM and DRA829VXEVM evaluation modules on TI.com for US$1,900 each.”

Preproduction TDA4VM and DRA8329V processors are available now, only from TI, at US$97 in 1,000-unit quantities. Volume production is expected to be available in the second half of 2020.

>> This article was originally published on our sister site, EE Times.

 

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