Analog Devices has introduced a mixed-signal front-end (MxFE) RF data converter platform that combines high-performance analog and digital signal processing for a range of wireless equipment such as 4G LTE and 5G mmWave radios. ADI’s new AD9081/2 MxFE platform allows manufacturers to install multiband radios in the same footprint as single-band radios, which as much as triples call capacity available in today’s 4G LTE base stations. With a 1.2 GHz channel bandwidth, the new MxFE platform also enables wireless carriers that are adding more antennas to their cell towers to meet the higher radio density and data-rate requirements of emerging mmWave 5G.
By shifting more of the frequency translation and filtering from the analog to the digital domain, the AD9081/2 provides designers with the software configurability to customize their radios. The new multi-channel MxFE platform meets the needs of other wide-bandwidth applications in 5G test and measurement equipment, broadband cable video streaming, multi-antenna phased array radar systems and low-earth-orbit satellite networks.
The AD9081 and AD9082 MxFE devices integrate eight and six RF data converters, respectively, which are manufactured using 28 nm CMOS process technology. Both MxFE options achieve the industry’s widest instantaneous signal bandwidth (up to 2.4 GHz), which simplifies hardware design by reducing the number of frequency translation stages and relaxing filter requirements. This new level of integration addresses the space constraints of wireless device designers by lowering chip count and yielding a 60 percent reduction in printed-circuit-board (PCB) area compared to alternative devices.
The MxFE platform processes more of the RF spectrum band and embeds DSP functions on-chip to enable the user to configure the programmable filters and digital up and down conversion blocks to meet specific radio signal bandwidth requirements. This results in a 10X power reduction compared to architectures that perform RF conversion and filtering on the FPGA, while freeing up valuable processor resources or allowing designers to use a more cost-effective FPGA.