Agilent Technologies Inc. has announced what the company claims to be the industry’s most accurate test solution for characterizing USB 3.1 receivers. Using the Agilent USB 3.1 receiver test set , design and test engineers can accurately characterize and verify USB 3.1 receiver ports in ASICs and chipsets.
The new USB 3.1 specification was released by the USB Implementers Forum in 2013, and the first USB 3.1 10-Gb/s-capable products are expected to reach the market in 2014. The USB 3.1 specification more than doubles possible throughput compared with the USB 3.0 specification. This throughput improvement was achieved by doubling the physical data rate from 5 to 10 Gb/s and by changing the coding scheme from 8-bit/10-bit to 128-bit/132-bit, which requires significantly less overhead.
R&D and test engineers who design and test USB 3.1 chipsets are facing new challenges. For receiver test, the doubled physical data rate means the margins for signal integrity are tighter. To ensure proper operation, the receiver must tolerate a mix of different jitter types. Three-tap de-emphasis is required to compensate for the losses of the channel. And finally, the analyzer must be able to filter 128-bit/132-bit coded skip-ordered sets with variable length during error counting.
The Agilent USB 3.1 receiver test solution features:
- accurate and repeatable receiver test results enabled by J-BERT’s built-in and calibrated jitter sources and intersymbol interference (ISI) traces;
- precise emulation of pre- and post-cursor de-emphasis;
- built-in clock recovery to reduce setup complexity;
- error counting accomplished by real-time filtering of the USB 3.1-specific 128-bit/132-bit coded skip-ordered sets (that can vary in length from the pattern stream); and
- investment protection enabled by using Agilent instruments that can be repurposed for accurate characterization in multiple gigabit test applications, such as PCIe, SATA, DisplayPort and others.
The Agilent USB 3.1 receiver test solution consists of either the enhanced J-BERT N4903B high-performance serial 12.5-Gb/s BERT with its integrated jitter sources and ISI and the N4916B de-emphasis signal generator; orthe J-BERT M8020A high-performance 16-Gb/s BERT with integrated and calibrated jitter sources (random jitter, period jitter, SSC), 8-tap de-emphasis and M8048A ISI channels.
The price for the J-BERT M8020A high-performance BERT starts at $122,200 for a one-channel, 16-Gb/s high-performance BERT with built-in clock recovery. The upgradeable J-BERT N4903B (the new option for analyzing 128b/132b-coded patterns) is priced at $12,500. The J-BERT requires software version 7.60 or later.