Altera Corporation has announced their Software Development Kit (SDK) for OpenCL (Open Computing Language), which combines the massively parallel architecture of an FPGA with the OpenCL parallel programming model. The SDK allows system developers and programmers familiar with C to quickly and easily develop high-performance, power-efficient FPGA-based applications in a high-level language. The Altera SDK for OpenCL enables FPGAs to work in concert with the host processor to accelerate parallel computation, at a fraction of the power compared to hardware alternatives.
The OpenCL tool flow automatically converts OpenCL kernel functions into custom FPGA hardware accelerators, adds interface IPs, builds interconnect logic and generates the FPGA programming file. The SDK includes libraries that link to OpenCL API calls within a host program running on the CPU. By automatically handling these steps, designers are able to focus their development efforts on defining and iterating their algorithms rather than designing hardware.
Using FPGAs to Extract Maximum Parallelism in Heterogeneous Platforms
The Altera SDK for OpenCL enables programmers to leverage the massively parallel, fine-grained architectures featured in FPGAs to accelerate parallel computation. FPGAs allow kernel functions to be transformed into dedicated, deeply pipelined hardware circuits that are multithreaded using the concept of pipeline parallelism. Each of these pipelines can be replicated many times to provide even more parallelism by allowing multiple threads to execute in parallel. The result is an FPGA-based solution that can deliver >5X performance/Watt compared to alternative hardware implementations.
The Altera SDK for OpenCL is production ready and is available to customers through an early access program.