Altera Corporation is shipping the first of its 28 nm Cyclone V SoC devices, which combine a dual-core ARM Cortex-A9 processor system with FPGA logic on a single chip. The new SoCs are targeted for wireless communications, industrial, video surveillance, automotive and medical equipment markets. They are designed to enable creation of custom SoC variants optimized for system power, board space, performance, and cost requirements.
Altera states it is the only FPGA vendor today shipping SoCs that offer 32-bit error correction code (ECC) support which helps ensure data integrity throughout the embedded system. ECC functionality is built into the SoC’s external DRAM memory interface and an extensive number on-chip memory instances and peripheral interfaces, including L2 Cache, scratch RAM, Ethernet MACs, USB ports and flash memory interfaces. Other unique features in the device family include a high-bandwidth memory controller with built-in memory protection, flexible boot capability and integrated PCI Express (PCIe) across all SoC devices.
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Altera and ARM have jointly developed the ARM Development Studio 5 Altera Edition toolkit with FPGA-adaptive debugging that exclusively supports Altera SoC devices.
Altera will demonstrate its Cyclone V SoC Development Kit at the ARM Technology Symposium Europe. The demonstration includes a Cyclone V SoC development board booting and running Linux on two CPUs. Altera representatives will be one hand to discuss the SoC FPGAs and to highlight its development tools ecosystem.
See design article “Achieving maximum motor efficiency using dual-core ARM SoC FPGAs”.