Working together Altium Limited and In-Circuit Design Pty Ltd (ICD) have come up with extensions to Altium's Designer tools for advanced stackup planning and power distribution network analysis for PCB designs for high performance applications.
According to Barry Olney, Managing Director and CEO of In-Circuit Design, the additions were needed to help developers deal with the increasing challenges concerning high-speed signals – not only because of high clock frequencies, but also because of faster edge rates.”More and more PCB designers need to have analysis tools that allow them to successfully design with fewer iterations,” he said.
The two extensions are the ICD Stackup Planner and ICD Power Distribution Network (PDN) Planner which are accessible from within the design tool to provide for seamless analysis.
“Attention to critical placement, fanout, matched length and differential pair routing are vital for more and more mainstream designs,” said Olney. “However, planning the multilayer PCB stackup configuration is one of the most important aspects in achieving the best possible performance of a product.
To help engineers and PCB designers to master this challenge, he said, ICD Stackup Planner include not only unprecedented simulation speed, ease of use and accuracy but accurate impedance control for rigid-flex design flows seamlessly, in the Altium environment, from concept to fabrication.
An 8,800 part dielectric materials library allows the simulation of the actual materials used by the PCB fabricator as well as a unique field solver computation of multiple differential pair definitions per layer. It also allows automatic creation of high-speed design rules in Altium Designer.
Olney said a typical high-speed, multilayer PCB has five or six individual power supplies that all serve a different purpose, and must be regulated to maintain power integrity during high current switching up to the maximum frequency.
To deal with this he said, with a frequency range up to 100 GHz, the ICD PDN Planner analyzes the AC impedance of each on-board PDN, including capacitor selection, to ensure a broad spectrum of noise reduction, giving a concise graphical view of the entire network including plane resonance peaks. It has a comprehensive capacitor library of 5,000 parts, allows the simulation and optimization of the actual capacitors extracted from manufacturer’s SPICE models.