SAN JOSE, Calif. — Advanced Micro Devices is gearing up to join a race to accelerate deep-learning jobs in client and embedded systems. However, AMD is not yet ready to provide any specifics on the 7-nm x86 and GPU chips that it aims to deliver over the next year — or its roadmap beyond 7 nm.

“There is a need for high performance with what we call the edge [of the network] … closer to the source where data is coming in and [needing] to be analyzed — often in real time,” said Mark Papermaster, AMD’s chief technology officer, in an interview. “AMD’s machine-learning strategy is holistic and provides engines of AI for both the data center and the edge.”

In late 2016, AMD released its first GPU accelerators for deep learning in the data center. Since then, Google’s TensorFlow Processing Unit and other designs have shown the advantages of adding arrays of multiply-accumulate units (MACs) in hardware to speed deep-learning algorithms.

In May 2017, graphics rival Nidia rolled out Volta, its first GPU with embedded MACs that it called tensor cores. AMD’s CPU rival, Intel, said earlier this year that it plans to move its Movidius accelerator to PC motherboards running Windows ML. Analysts believe that Intel will embed Movidius-inspired cores into its PC processors eventually.

Papermaster would not say whether AMD plans to add MAC arrays to the 7-nm Vega GPU that it will launch later this year or the Zen-2 x86 processors that it will release early next year. However, he did say that Vega will support additional formats beyond the 16-bit floating point that the company’s GPUs support today.

A lively debate rages over ways to simplify neural networks to speed deep-learning jobs. Arm will support 8-bit operations in its ML Core, Nvidia has done research on 2-bit operations, and Imec is researching a single-bit alternative.