LONDON ARC International is introducing 104 128-bit wide customized SIMD (Single Instruction Multiple Data) instructions that take advantage of parallelism inherent in multimedia applications.
ARC’s SIMD instructions are fully compatible with the ARCompact 16- and 32-bit instruction set architecture (ISA) and will be incorporated into a Multimedia subsystem being underdevelopment as well as other products from ARC.
The instructions reduce power consumption by increasing application performance without raising the processor clock speed. As well as video codecs including H.264, and MPEG 1, 2, 3, and 4, the ARC Multimedia subsystem supporst most audio codecs.
ARC current has the the extensions running on its ARCangel 4 Vitex-4 FPGA-based development which runs the codecs in real-time.
The company says SIMD technology can deliver a 10x performance improvement in multimedia and networking embedded processing tasks that contain a high degree of application-level parallelism and that the 128-bit SIMD extensions exploit this parallelism more efficiently than superscalar architectures and techniques such as symmetric multi-threading (SMT).
A direct memory access (DMA) engine is coupled with the SIMD extensions, speeding system performance and both the DMA engine and SIMD extensions are compatible with the ARCompact ISA and available as predefined options in the ARChitect processor configurator.
Third party development support for the extensions include the MQX RTOS and Codito which will be providing full support for the SIMD infrastructure in Linux and the GCC toolchain. Other support comes from Express Logic's ThreadX RTOS, Green Hills'MULTI debugger, the Tao Group's intent multimedia software platform, and Virage Logic.