Argosim to debut STIMULUS, a modeling and simulation tool, at Embedded World 2015 -

Argosim to debut STIMULUS, a modeling and simulation tool, at Embedded World 2015


Argosim, a software company that provides innovative tools to validate real-time systems requirements, will make its debut at Embedded World 2015 , to be held Feb. 24-26 in Nürnberg, Germany. Argosim will unveil STIMULUS, a modeling and simulation environment to edit, debug, and test requirements , with a technical presentation and demos that exhibit how early validation of requirements can be achieved. 

Hall 4, Stand 236: Demo features takeoff procedure of intelligent drone
The demonstration will use STIMULUS to validate the takeoff procedure of an intelligent drone, which is able to autonomously track and film moving people equipped with a mobile phone. To show how STIMULUS makes requirements right the first time, Argosim will offer a snapshot of the whole development process—from early modeling and simulation of safety requirements to the automatic generation of test vectors during software-in-the-loop validation of the mobile controller. Visiting engineers will see mobile requirements modeled alongside drone requirements using predefined sentence templates. The unique simulation feature will generate execution traces that satisfy requirements, which can be analyzed to find faulty requirements.

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On Thursday, Feb. 24 at 16:30-17:00, Dr. Bertrand Jeannet, CTO of Argosim, will present “Debugging Real-Time Systems Requirements: Simulate the “What” Before the “How”. Jeannet will show system architects how they can debug and validate functional real-time requirements early before the design phase begins. STIMULUS relies on a high-level, constraint-based, real-time language to express requirements in natural language and an algorithm-based simulation engine to generate and analyze executable traces that satisfy requirements. By discovering incorrect, ambiguous, missing, or incomplete requirements before the design phase starts, engineers can reduce specification errors, process iterations, and design costs.

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