ARM moves Cortex-R4 core to dynamic CMOS domino logic for 2X speed boost -

ARM moves Cortex-R4 core to dynamic CMOS domino logic for 2X speed boost

Austin, Texas – In order to squeeze as much performance at the lowest power consumption possible for a wide range of mainstream consumer-oriented applications, microprocessor vendors have begun re-considering options that were previously labeled as impractical, too costly, and to hard to fabricate.

These have included such options as silicon on insulator, silicon on sapphire, asynchronous self-timed logic, and now, this week, dynamic CMOS logic and its variant, Domino logic.

Just as it did with NXP spin-off Handshake Solutions NV for an asynchronous self-timed logic implementation of its popular ARM RISC processors, ARM Ltd. has entered into an agreement with Intrnisity Inc. to produce high performance versions of its CPUs using the company's proprietary dynamic logic-derived Fast 14 1-of-N logic technology.

The reason for the shift, said Peter Lewin, product manager at ARM, is simple: “a wide range of mainstream processor applications from mass storage to printing and networking applications need ever increasing levels of performance to handle higher data rates, more media services and new functionality such as encryption.”

First to benefit from the technology is the ARM Cortex-R4X processor implementation, which, Lewin claims, will operate at twice the maximum frequency of a Cortex-R4 processor implemented using standard synthesis techniques on the same process.

Specifically, said Graham Budd, executive vice president and general manager, Processor Division, ARM, Cortex-R4X processor implementations will be able to operate at speeds of up to 600 MHz in the TSMC 65LP process, significantly improving the performance of products such as hard disk drives, printers and networking equipment, while minimizing power consumption.

With delivery expected in Q1 2008, said Budd, cores implemented with the Fast 14 technology will also be targeted at applications in automotive electronics (car chassis, braking and power train), digital video and still cameras and mobile wireless modems.

Like virtually everyone else in the consumer marketplace, the mainstay of ARM's designs, said Lewin, has been static CMOS processes, which because of the low DC power of a static gate makes it a no-brainer in most high volume consumer applications.

One significant disadvantage of static CMOS logic, he said, has always been its relatively slow gate speed. By comparison, dynamic CMOS circuits are two to three times faster.

The company over the years has looked at domino and dynamic CMOS several times, but despite all of the performance advantages did not make the move, because of power consumption concerns. “It took a look at what Intrinsity had done, especially in relation to the use of multiphase overlapped clocking, to convince us to finally make the move,” said Lewin.

According to Bob Russo, CEO at Intrinsity, the Fast 14 implementation of the Cortex R4 has a power/frequency ratio superior to static logic, and is capable of about double the maximum frequency, consuming only 340 milliwatts at 600 MHz.

Various configurations of the Cortex-R4 processor will be available as Cortex-R4X implementations, on a range of silicon processes. The first implementation will operate at 600MHz under worst-case operating conditions on the TSMC 65LP process.

As a cycle-accurate implementation of the Cortex-R4 processor, it executes all the same software binaries, and is fully supported by the RealView Development Suite, said Lewin. Standard Cortex-R4 processor models can be used for cycle accurate modelling of the Cortex-R4X processor implementation with RealView SoC Designer, offering rapid prototyping and architectural exploration.

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