ASSET jacks up performance of IJTAG tool - Embedded.com

ASSET jacks up performance of IJTAG tool

Improvements to the graphical viewer and significantly faster performance are among the enhancements to ASSET InterTech’s ScanWorks IJTAG Test tool, which enables engineers to access, control, and automate the operations of test and measurement instruments embedded in chips. ScanWorks IJTAG Test supports the new IEEE P1687 Internal JTAG (IJTAG) standard for embedded instrumentation.

IJTAG standardizes the way engineers control and access the instruments they have embedded on-chip. In addition, these same embedded instruments can be re-applied later to test, validate, and debug prototypes of circuit board designs and manufactured boards.

ScanWorks IJTAG Test tools can read IJTAG’s two languages, Instrument Connectivity Language (ICL) and Procedural Description Language (PDL). ICL defines the access connections for the instruments embedded on-chip while PDL is an extension of the popular Tcl (Tool Command Language) for programming validation, test and debug vectors to be executed by embedded IJTAG instruments. With the graphical user interface on ScanWorks IJTAG Test engineers can drag-and-drop instruments and specific operations to automatically develop test routines.

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