Aster integrates DfT workflow from design to production - Embedded.com

Aster integrates DfT workflow from design to production

A tool to provide an integrated workflow for design for test (DfT) and test coverage analysis from design through to mainstream production is being introduced by ASTER Technologies (Cesson-Sévigné, France).
      
In the traditional design flow, DfT is a specific step after the layout phase as addressed by tools such as FabMaster-TestExpert. The CAD file is loaded and a mechanical analysis is performed in order to identify the physical access for in-circuit or flying probe test.
      
With increasing board density the DfT has to be consdered as part of the complete workflow (not just for probe placement),
verifying the testability at different stages in order to ensure the highest level of test quality for the minimum test cost.
      
TestWay Express has been developed to meet this vision for a software tool that will allow users to analyze each stage of the design to production workflow within a single tool.
      
This is achieved by the following stages:

  • From Schematic, verify that electrical DfT requirements are adhered to in order to maximize test coverage, optimize test probe placement according to test strategy definition, estimate test coverage, estimate cost modeling, production yield and TL9000 – initial return rates.
  • From layout, verify mechanical rules, allocate test probes, estimate test coverage based on the real physical access, and generate test programs including input list and test models for the most popular test platforms.

TestWay Express includes 53 CAD importers supporting schematic netlist, layout, schematic graphics and design or test models. This is a key differentiator as other commercial DfT tools work only from the layout stage. TestWay Express operates from native CAD formats and insures the full interoperability between all stages across the design/manufacturing flow.
      
In the past, test engineers had to use a variety of software tools to verify that a board had been designed with adequate testability in order to maximize test coverage, and verify that the board layout engineer had placed test points where requested. However, once the test points had been validated it was still necessary to develop the ICT or flying probe test
program files, which required another process stage.

With TestWay Express, all stages are managed within a single tool through an integrated methodology. Test coverage is estimated using theoretical models for a wide range of test and inspection strategies such as APM, AOI, AXI, BST, FPT, ICT etc, and functional test, that can be tuned to reflect the test and measurement capabilities of the target tester.

Once the test/inspection programs have been completed, TestWay Express can read the debugged test program or test report and compare the coverage between the estimated and measured analysis using industry standard metrics, and identify any misalignment.
      
More than 50 coverage importers are available for a range of the test/inspection machines used within the industry.

The tool will be demonstrated at APEX 2011, in  Las Vegas on April 12-14.

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