Building a multi-voltage, high performance, ultra low standby power 32-bit MCU -

Building a multi-voltage, high performance, ultra low standby power 32-bit MCU

Requirements for increasing computing power and more integratedfunctions are driving a growing number of applications from 16-bit to32-bit microcontrollers.

This is equally true for battery powered applications, which benefitfrom the lower voltage supply, as well as the high performance andsmall die size achieved by 32-bit devices that are based on advancedCMOS process.

However, deep submicron technologies also have a very importantdrawback: their much higher leakage is a major issue, especially forthe limited power resources of a battery powered application.

To enable migration, new 32-bit microcontrollers, including generalpurpose devices, must provide very efficient ultra low power modes forlong term standby.

In this article I will describe how STMicroelectronics engineersenhanced its Cortex-M3 core-based STM32 microcontrollers with low powermodes and features that mitigate the impacts of leakage on batterypowered applications where static current may be a major contributor toconsumption.

Specifically I will address  innovations in “ultra low powerstandby” and Real Time Clock implementation in our STM32 ARM Cortex-M3core-based microcontrollers.

Leakage current
The leakage can be defined as the remaining continuous current in aCMOS gate in static state (no switching activity). It has several rootcauses, and increases with each new technology shrink. Its three maincontributors are sub-threshold, gate, and junction tunneling leakage.

Figure1: Leakage currents in a CMOS transistor

Sub-threshold leakage is linked to the threshold voltage diminutionthat is required with the decreasing voltages used in each newtechnology. Gate leakage is induced by the scaling of the gate oxidethickness that is needed to reduce the “short channel” effect. Junctiontunneling leakage is induced by the electric field across a reversebiased p-n junction (tunneling of electrons).

Leakage increases as temperature rises mainly due to the exponentialincrease of the sub-threshold leakage over temperature. Without anyswitching activity, the quiescent current of a 32-bit microcontrollerusing advanced process can still be limited to a few microAmperes atambient temperature.

However this leakage will rise with temperature and can even exceedone milliampere at 125°C. For this reason, it is very important totake into account the leakage at the maximum application temperature.

Figure2: Leakage increase with temperature

Even though several techniques exist to limit the leakage of adigital library (increase poly length above minimum allowed by thetechnology, increase gate oxide thickness on transistors), suchmodifications impact the propagation time in the digital cells. Usingsuch a library in the entire core logic would prevent the device fromachieving high performance in run mode.

The added dilemma for today's 32-bit devices is that, from astructural point of view, the main contributors to leakage current in amicrocontroller are digital logic and memories.

In addition to the increasing leakage due to technology shrink, boththe digital gate count and average memory size have increaseddramatically in subsequent generations of 8-bit, 16-bit, and new 32-bitmicrocontrollers.

As a result, leakage is a major problem for all general purposemicrocontrollers using the latest semiconductor technology and is aparticular consideration for battery powered applications with theirlimited power resources.

Impact of leakage on batterylifetime
Static current consumption becomes the main contributor to averagecurrent as soon as the average run time becomes very low compared tothe standby time. Given the energy level provided by a battery, a quickestimation of the application lifetime (not including non-linearity ofthe battery capacitance described by the Peukert law) is:

For example, if the specific ultra low power standby mode was notavailable on the STM32 128K flash microcontroller the average currentcould be significantly impacted: typical run current at 72MHz with allperipherals enabled is only 36mA (0.5mA/MHz) thanks to the ARMCortex-M3 architecture and low power design techniques.

However, due to the use of advanced process, the leakage currentstarts to be significant at 55°C. Thanks to a very low powervoltage supervisor and regulator, static current is still limited to 50microAmperes at 55°C.

This is negligible compared to the run consumption. However if theapplication runs only one minute a day, the static current becomes themain contributor to consumption (64%).

To address this problem, the designers of the STM32 went to greatlengths to enable a true low power standby by implementing an embeddedregulator, independent voltage domains, and integrated power switchesat the architecture level. This implementation enables low power modesthat can optimize battery life depending on the application.

Ultra low power standbyimplementation
The total consumption of a microcontroller is the addition of dynamicpower (switching activity of CMOS gates) and static current (leakageand static analog consumption).

Stopping the product clocks, thereby eliminating all dynamicconsumption is obviously not a sufficient low power standby for abattery powered application where static current can be a maincontributor to consumption.

Even decreasing the core voltage when clocks are stopped is oflittle help in providing an efficient standby mode. To achieve ultralow power standby mode, most of the core logic (and memories) must bepowered off.

To do this, two voltage domains can be implemented at device level,which can be powered by the internal regulator: a small “always on”voltage domain for low power control and a “main core” voltage domainwith all other functions powered through a switch in order to shut itdown in standby mode.

As a result, the main core voltage domain can focus on processingperformance as the leakage (static current) design constraints aremainly important in the “always on” voltage domain.

However, in this implementation the internal regulator must be kept”on” in standby mode, implying a significant quiescent current. Forthis reason, it is better to stop the embedded regulator in order toreach an ultra low standby supply current.

The STM32 follows this type of dual-domain implementation with:

VDD backup master voltage domain based on thick oxide highvoltage transistors focusing on very low static current. With the highvoltage transistors, it is directly powered by the main VDD. Itincludes low power mode control and very low power watchdog, associatedlow power RC oscillator and an optimized gate count.

Slave main core voltage domain , which includes all otherfunctions (CPU core, most peripherals, and memories) kept at lowervoltage, focusing on high performance and low dynamic power.

Figure3: Backup and core voltage implementation

This implementation allows the STM32F103 to offer a safe, very lowpower standby mode with only a 2µA typical current at 3.3V. Theremaining 2 microamperes current is the consumption of the accuratevoltage supervisor that monitors the main supply voltage to ensure thatthe standby mode is as reliable as the run mode.

Since leakage can be kept very low, increase of this standby currentwith temperature is very limited: 2.4 microAmperes at 85°C 3.3V fora typical device. Dynamic functions can also be implemented in themaster voltage domain.

For example, the STM32 includes an independent ultra low powerwatchdog that is available in standby mode with a total addedconsumption (dedicated RC oscillator and watchdog digital consumption)of only 1 microAmpere at 3.3V for a typical device. This feature canprevent application failure in case of an unexpected entry in standbymode.

Separating the voltage domains inside the microcontroller siliconimplies many specific design constraints such as:

* Full wake up logic and analog must be implemented in the backupvoltage domain making it difficult to offer a large number of possiblewake-up sources.

* Isolation between voltage domains during power down must beimplemented (all signals coming from core voltage are floating)

* The specific sequence for clock source stops and voltage powerdown/power on must be robust. The main core voltage logic needs adedicated reset for example.

* Timing constraints between voltage domains must be taken intoaccount specifically because both domains are nearly independent forvoltage and process, but not for temperature. This implies that morecases have to be checked during timing analysis (Backup domain withworst voltage and process and main core voltage with best process bestvoltage for example)

* Some security features like watchdog function must be implementedin the backup domain in order to protect the application fromunexpected standby mode entry.

* Keeping the ratio of useful I/Os versus total number of I/Os isalso required to offer the performance of 32-bit product in smallpackages. On the STM32, the main core voltage regulator does not needexternal decoupling capacitors. This is why no extra power pin is loston the package because of this dual power implementation.

However, in exchange for this silicon design complexity, the STM32gains a true ultra low power standby that will help applicationdevelopers optimize battery consumption in their applications.

STM32 available power modes andoptimizing battery life
As a result of the dual power domain implementation, STM32 provides twodifferent low power modes: Stop mode and Standby mode. Both functionwith the voltage supervisor “on” to protect the application in case ofa voltage drop:

In Stop mode , the low power regulator is kept “on” but clocksare stopped. It provides very fast restart time on internal RC (<10microseconds) and retains the software context. Typical current atambient temperature is 15 microAmperes(3.3V).

However this mode does not mitigate the problem of leakage, whichincreases exponentially with temperature.

In Standby mode the regulator is “off” in order to provide a2µA current at ambient temperature (3.3V) and very littleincrease with temperature increase (2.4 microAmperes at 85°C for atypical device).

However, restart from standby implies that software content is lost:RAM, core and most peripheral register contents are lost: restart fromstandby is nearly equivalent to a restart from reset for the software.

Choosing the best mode for an application can have a large impact onbattery life. Here are some basic tips to consider when selecting amode:

1. Check if themicrocontroller state in standby is compatible with applicationrequirements (for example: I/Os standby state, wake-up sources).

2 . Consider theimpact on battery life of the “worst case” temperature conditions underwhich application functionality must be guaranteed

3. Check what therestart from standby time is, and if it is fast enough for theapplication restart time requirements

4. Check if thereis a savings in energy consumption in stand by compared to stop mode.Between two events, is the standby consumption plus the restart fromstandby consumption less than the consumption in stop mode.

These questions are application dependant. Estimating the restarttime from standby mode includes the time from wake up to reset vectorfetch, which depends on hardware (regulatorstartup time, clock source startup time around 40 microseconds in STM32 )and the time needed by the software to restore the application context.

Typically the software must check the wake up source(s), recovercontext information from backup registers and re-configure themicrocontroller functions used by the application.

Because of this software dependant restart from standby, the energylost during this wake-up phase is also application dependant. Onepractical way to estimate this energy loss is to produce a given amountof wake-ups in a time frame (softwaregoing back in standby mode just after the wake-up ) and comparethe average current consumption when no wake-up is generated.

In order to optimize the restart time from standby mode, thedeveloper must not forget to optimize the initialization phase added bythe compiler and reduce it as much as possible (RAM initializationshould be removed for example).

Additional voltage domain for RTCand data backup
The Real Time Clock feature is a common requirement for battery poweredapplications. Moreover, core voltage shut off implies loosing thecomplete program context and is nearly equivalent to a product restartfrom reset.

Implementing backup register bank for application restart allows therecovery of minimum context required for program execution. Integratingthese functions directly inside the microcontroller can be done in abackup domain.

However, the RTC function is typically supposed to be available overan extended period of time (years) while the main application, even ifbattery powered, is often based on a rechargeable battery.

Creating a third power domain for the RTC and offering a dedicatedpin for its power supply allows the use of a small coin cell dedicatedonly to this function, while the main application is supplied byanother main supply source.

This way the coin cell power is only used by the RTC and associatedoscillator, and not by the other functions, such as the voltagesupervisor which is still available in Standby mode.

However, this implementation is not optimal as the coin cell isalways used to provide the power to the RTC and backup registers evenwhen the main power supply is available.

A smart alternative that is implemented in the STM32 is to extendRTC battery life by adding a power switch to provide current to RTC andbackup registers from the main supply when it is available and from thebattery when the main power is not available.

Figure4: Simplified schematic of STM32 voltage domains implementation

The switch command is provided by the main voltage supervisor with aspecific latching mechanism. When the voltage drops below the VDD lowthreshold, the switch changes the RTC and backup registers' powersource to external VBAT power.

If VDD rises above the VDD high threshold, the switch automaticallyselects VDD as the power source for this dedicated voltage domain.

One additional advantage with this implementation is that extradynamic power consumption resulting from software read/write access tothis specific voltage domain (through level shifters) never impliesextra consumption on the coin cell.

In run mode current is always taken from the main supply. Thus, coincell minimum battery life can be directly calculated based on RTCconsumption and the coin cell energy.

On STM32 with a typical RTC current of 1.4 microAmpere (ambienttemperature 3.3V) the minimum battery lifetime when using a CR2032battery is close to 20 years. However, if the main power is presentmost of the time, the life can be much longer and a coin cell withsmaller capacity can be used.

The implemented RTC and backup registers are, of course, availablein standby mode. Thus, the RTC can be the source of the wake up fromstandby and some key values can be saved in the backup registers beforeentering standby mode.

This implementation significantly increases the complexity of theMCU design, requiring:

1) More complexisolation between voltage domains

2) Robust powerswitch design, correctly adjusted to expected consumption (internal RTCvoltage domain is not present on I/Os to avoid reducing the number ofgeneral purpose I/Os available in small parkages, so no decouplingcapacitor can be added.)

3) Considerationof different startup scenarios without added static consumption onVbat. For example, Vbat rising when VDD is not present must not lead toan unexpected state (there must be no consumption in this state becausethe coin cell may be soldered to the application during productionphase and consumption would cause an unnecessary depletion of itsenergy level)

4) The RTCvoltage domain must be designed to tolerate a significant voltage dropbelow the VDD minimum threshold before switching on Vbat.

Ready for battery poweredapplications
In spite of some new application considerations linked to context lossin a standby state, the ultra low power standby and multi-voltage powerarchitectures like that of the STM32 can be effective solutions thatallow an application to function in a high performance run mode, whilemitigating the impact of static consumption in stand by mode.

In addition, thoughtful integration of standalone functions, likethe RTC in the STM32, can enable fast and efficient development ofbattery powered applications and optimum use of application powersupplies.

Jean-Michel Gril-Maffre is SeniorDesign Engineer working in Rousset, France for STMicroelectronics'sMicrocontroller Division. His work focuses on MCU design in theSystem on Chip design team.

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