Carrier card melds PowerPC and FPGA engines with PMC I/O -

Carrier card melds PowerPC and FPGA engines with PMC I/O



FFT, Pulse Compression, Image Processing Handled on PMC Carriers Dramatically Reduces Processor Board Count and System Size

Chelmsford MA—TEK Microsystems, Inc. of Chelmsford MA announces the PowerRACE-3A carrier card, combining high density FPGAs, an onboard switched fabric, PowerPCs, and PMC interfaces. In this new breed of embedded platform, high speed I/O and image processing are done in a single slot. For example, in a complex image processing applications such as UAVs (unmanned aerial vehicles) or in advanced industrial inspection, the PowerRACE-3A can reduce system board count by up to 40 percent, reducing weight, power, volume and cost.

TEK Microsystems PowerRACE-3A carrier cards combine PowerPC and FPGA processing engines with powerful PMC I/O capabilities.

“The announcement of the PowerRACE-3A is TEK Microsystems’ next step toward providing complete embedded systems,” said Andy Reddig, president and CTO of TEK Microsystems. “As the leader in both high performance PMC I/O modules and integrated I/O solutions for switched fabrics, we have been continually enhancing our technology to handle a larger and larger part of the embedded computing challenge. It's the new embedded paradigm—using FPGAs and flexible, core-based switched fabrics. The PowerRACE-3A is a tightly integrated PowerPC-based platform that delivers customizable I/O with the convenience of built-in intelligent stream management. As a client-server solution, it includes a common API that provides rapid technology insertion with low integration risk and a seamless migration path.”

The PowerRACE-3A uses two 800 MHz 440GX PowerPC processors to support high throughput without incurring host processor overhead. Currently supporting the RACE++ interconnect fabric, future implementations will be fabric agnostic. An on-board fabric allows each PMC site to transfer data concurrently to off-board RACE++ ports, FPGA processing or to memory thereby eliminating fabric contention and maximizing overall system performance. Configured with any one of the more than 30 available TEK Microsystems PMC modules, the new PowerRACE-3A delivers unmatched speed and flexibility.

Included with the PowerRACE-3A is the tekX software environment, providing tools for fabric configuration, buffer management, data transfer, interprocessor communications, data storage/playback and integration of streaming FPGA and I/O modules. tekX reduces system development cycles by using a common API to shield the developer from the complexities of the fabrics and the hardware. The tekX environment supports all current PowerRACE models and will support integration of future products without application changes. The result is low integration risk and seamless technology upgrades.

The PowerRACE-3A is available 10-12 weeks ARO and is priced beginning at $17,995.

This air-cooled carrier card from board maker TEK Microsystems is the latest addition to the company's existing PowerRACE family of fabric-enabled I/O processors. They’re all equipped with lots of Xilinx Virtex II Pro FPGA -based (field programmable gate array) co-processors.

This latest PowerRACE-3A iteration promises to crank through high-end intensive computations. As such, it should readily meet the needs of high-speed FFT s (fast Fourier transforms) for spectral analyses, do pulse compression, or handle high-performance image processing (maybe a PowerRACE-3A-equipped aerial vehicle can snapshot Osama bin Laden's hideout).

With more memory than its predecessors, and faster 440GX PowerPC microprocessors aboard, the PowerRACE-3A comprises a streaming I/O platform that can operate in high-speed camera interfaces, and serial and parallel links, or handle the likes of network protocols, or data recording. TEK claims this board will operate with a ten to 15 times performance advantage over predecessor PowerPCs .

250-Mbyte/s Throughput

Not mentioned in TEK Microsystems's press release (on the left) is the fact that the PowerRACE-3A provides sufficient processing to sustain more than 250-Mbyte/s throughput over each of its two PMC (PCI mezzanine card) sites.

The board's architecture also packs a dedicated CPU per PMC slot. A local 800-MHz 440GX PowerPC processor is available for I/O-protocol processing, sustaining throughput without host processor overhead. It's backed up by 128-Mbytes or 256-Mbytes of SDRAM ; the memory offers a 64-bit 2-Gbyte/s bandwidth. The local CPU also utilizes 8-Mbytes of flash, and operates over a 64-bit 33-MHz PCI bus interface.

Beyond that, the PowerRACE-3A carrier card's RACEway interface (meeting ANSI/VITA 5.1-1999 specs) is also Dual RACEway compatible, and Mercury TC-RWI-FS-1 (11/08/00) RACE++ compatible. Transfers are performed at 267-Mbytes/s (burst throughput).

Front-End/Back-End PMCs

In addition, TEK Micro's front-end/back-end PMC design gives you re-usable core logic, and it applies across the entire line of the company's I/O modules.

The scheme enables protocol interfaces (front-ends) to change, while relying on a small set of standard back-end interfaces. The back-end interfaces can be PCI or XMC , for example; these talk to the PowerRACE carrier. On the front-end, TEK Microsystems's interfaces include those for FPDP (front-panel data port), HOTLink, LVDS, TAXI, to name just a few.

You can also implement Fibre Channel with JBOD/RAID with FAT32 support, or using point-to-point and 1.062-Gbit/s and 2.125-Gbit/s serial. The FPDP port complies with ANSI/VITA 17.1 specs and supports 1-Gbit/s and 2.5-Gbit/s transfers.

Software Support

TEK Micro's press statement mentions the tekX software tools for fabric configuration, buffer management, data transfer, etc. Indeed, the tekX environment supports portable and scalable application development for the company's entire line of fabric enabled boards.

According to TEK, the tekX environment supports all current products, and will also support future products without application changes.

In use, the tekX run-time environment abstracts the intricacies of the hardware into a well-defined portable set of software objects. These include objects for shared memory buffers, message queues, sockets, and semaphores. Low-latency deterministic functions are provided to move data between objects.

Software Preservation

While the objects speed development of your applications, TEK Micro's environment also ensures software preservation across changing configurations. This requires insulation of run-time objects from their underlying configuration.

To achieve this, the objects must be position-less, and that's handled by tekX's configuration database. The configuration database, distributed for low-latency access, gives objects the portability (they're referred to by name).

The tekX environment confers additional advantages. For example, early prototyping on scaled-down configurations, with later deployment on larger configurations, is typically only a matter of regenerating the configuration database. Long-term software commitments to a specific fabric can be avoided.

The tekX tools also permit development using a target platform's native tool chain.

Pre-Packaged FPGA IP

TEK Microsystems also offers pre-packaged FPGA IP (intellectual property). TEK's off-the-shelf IP images include cores supporting fabric interfaces, DDR (dual data-rate) SDRAM controllers, and clock functions. A factory default FPGA image loads on PowerRACE-3A power-up. Finally, demo software lets you start exercising the board's FPGA immediately.

Running underneath the TEK demo software, tekX provides native support for the fabric interface and memory controllers. It does this through a portable API (application programming interface).

TEK's tekConnect provides a uniform open interface between your IP and TEK Micro's IP cores. This gives you a more or less pre-built pipeline between the local processing node, your own FPGA images, and application data stored in external memory out on the fabric.

An FPGA developer’s kit is available so you can roll your own FPGAs. The kit is what helps you generate and integrate your own FPGA IP. The kit ensures a low-risk development environment.

Click for larger image

To bootstrap the process, the kit provides a ready-to-use Xilinx ISE -compatible project capable of generating TEK Micro's factory image. Using this project as a starting point, modules can be added and deleted to simplify development of new images.

Click here for a brief datasheet (in Adobe Acrobat .PDF format).

For more details, contact TEK Microsystems, Inc., 2 Elizabeth Drive, Chelmsford, Mass. 01824-4112. Phone: 978-244-9200. Fax: 978-244-1078. E-mail: Sales: or

TEK Microsystems , 978-244-9200,

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