Choosing between a positive or negative buck topology in a switching regulator design - Embedded.com

Choosing between a positive or negative buck topology in a switching regulator design

High-efficiency step-down switching regulators forpositive voltages are very common. However, negative step-downswitching regulators (negative voltage in, negative voltage out, commonground) are not as well known, even though they are often needed.Although they are not difficult to set up, literature on how to buildthem is rather scarce.

This article analyzes the architecture and detailed operation of thenegative buck topology. It will also discuss actual circuitimplementations for the topology, from a system perspective down to thebuilding of the needed circuit blocks, and include examples on how tobuild a voltage translator circuit, a key block in implementing anegative buck regulator using readily available boost ICs.

Figure1: Shown is the basic architecture of a negative buck topology.

Negative buck topology
Figure 1 above shows the basicarchitecture of a negative buckswitching converter. Like a positivebuck design, it has a high-side pass device between input and output,an LC output filter, and a catch diode. The two big differences are thegate drive needed in the control IC and the feedback circuitry.

In a positive buck, a typical negative-channel FET (NFET) usedas a high-side pass device requires a gate-drive voltage higher (morepositive) than the systems input voltage (Vin) in order to be turnedon. Since the input voltage is the most positive voltage in the systemalready, special circuitry is needed to generate an even highervoltage.

Positive buck ICs usually have this function built in. In a negativebuck, an NFET used as a high-side pass device also requires agate-drive voltage more positive than the system's input (-Vin). Inthis case, since this input voltage is the most negative voltage in thesystem, no special circuitry is needed.

All other voltages, including the output, are “higher” (morepositive), with the converter ground being the most positive voltage inthe system. Under these circumstances, a low-side FET pulse-width modulator controlIC (such as a boost/flyback regulator or controller) can be used toimplement the converter.

A variety of ICs may be used to implement negative buck converters,including controllers and integrated monolithic regulators with lowside NFETs. Monolithic ICs provide simplicity, ease of implementationand lower component count. Controllers offer greater flexibility whenlarger output currents are needed, and when there's a need to optimizefor efficiency and thermal dissipation.

Figure2: This negative buck topology uses a monolithic LM5001 boost/flybackregulator.

Figure 2 above shows asimplified diagram of a 3.1-75V input- voltage-range boost/ flybackregulator in a negative buck topology with a built-in75V, 1A NFET.

In a regular boost application, it will put out a gate-drive voltageto its built-in pass N-channel MOSFET a few volts above ground in orderto turn it on. In a negative buck application, the gate drive willstill put out a gate voltage a few volts above the IC's ground pin,which in this case is tied to the system's input voltage (-Vin) andwill yield the needed results.

Different from a regular boost, but the same as a regular buck, peakIC-switch current in Figure 2 is the same as peak inductor/output current, thus allowing a 1A boostIC to be used for output currents up to 1A. Other regulators withdifferent ratings would be used for higher or lower switch currents. Ifa controller is preferred, it would be used in a similar configurationto the one in the figure.

Voltage translators
The other special consideration in a negative buck architecture usingan off-the-shelf boost IC is the signal conditioning needed for thefeedback path. Most ICs require a voltage around 1.25V (relative totheir ground) at their feedback (FB) pin to maintain regulation. Thisvoltage is usually obtained from the output (Vout) and simply scaleddown through a voltage-divider resistor network.

This technique easily allows the voltage applied output goes up andto go down as the output goes down, which is needed to maintain properregulation. When this approach is taken in a positive buck, both the FBvoltage and the output voltage are naturally referenced to the systemground and the IC ground pin, so no conditioning or translation isneeded.

In a negative-buck application implemented with a low-side FET boostIC, the output (-Vout) and any voltage-divided sample of it are stillreferenced to the system ground. However, since the IC ground pin isconnected to -Vin and not to the system ground, the IC will not readthe FB voltage correctly (nor will keep regulation correctly) and thusthis voltage needs to be translated so it is referenced to the ICground pin.

This voltage translation is represented by the small box in Figure 1and Figure 2 labeled “Level shift”. There are multiple ways of gettingthis implemented in hardware.

Figure3: Voltage translation can be implemented in hardware using a currentmirror built with two pnp transistors.

Figure 3 above shows one ofthe simplest, most common, and possibly less expensive ways. It uses acurrent mirror built with a couple of inexpensive pnp transistors. Forbest performance and tighter regulation accuracy, a matched pair isrecommended.

Matched pairs can be found in single packages; a good example is theDMMT3906. In Figure 3, Rf1 and Rf2 scale down themirrored voltage and are thus used to set the regulator's outputvoltage (just like the case of any adjustable regulator). In otherwords, feedback gain is |Vref /Vout| and |Vout| is Vref x Rf1 / Rf2,where Vref is the IC feedback pin (reference) voltage. A variation ofthe current-mirror circuit is shown in Figure4 below.

Figure4: This variation of the current-mirror circuit uses a single pnptransistor and discrete-diode current mirror.

In this circuit, a single pnp transistor is used. D1 provides outputvoltage temperature compensation by canceling out the effects of thetemperature drift of Q1's pnp emitter-base voltage. D2 and D3 providesome pre-regulation for the biasing current needed for D1, thusimproving both line regulation and ripple rejection by a factor of two.

Additional performance improvement is possible by replacing the twoseries-connected diodes with a voltage reference such as the LM385-1.2or LM4040-2.5.

To simplify the circuit, or if the input voltage is relativelyconstant and has very little ripple on it, D2 and D3 could beeliminated and the biasing resistors combined. Also, eliminating D1will provide a negative temperature coefficient of the output voltage.

Op amp option
Designers who prefer the benefits and simplicity of op amps comparedwith designing using discrete components can implement the voltagetranslating circuit using an op amp as shown in Figure 5 below .

Figure5: Designers who prefer the benefits and simplicity of op amps overdesigning with discrete components can implement the voltagetranslating circuit using an op amp.

By connecting the op amp in a very similar configuration to the oneused when sensing and amplifying differential voltages, it can be usedin the negative buck configuration to jointly scale-down the outputvoltage. This makes it suitable for the FB pin (thus setting theregulator's output voltage) and, at the same time, shifts the referencefor this voltage from the system ground to the -Vin rail.

The specific op amp used depends on application requirements but, ageneral-purpose op amp is usually adequate. Low offset voltage isimportant for voltage accuracy of the regulator and the op amp needs tohave a common mode voltage range greater than the application's Voutmagnitude.

Conclusion
A variety of boost/flyback regulators can be used for implementingnegative buck converters. Regulators and controllers with wideinput-voltage range were used as examples, due to their flexibility ina broad range of applications.

Even though boost ICs are the most readily available, off-the-shelfsolution to implement negative buck converters, it is important toreiterate we are in fact not boosting a negative voltage, Instead, weare bucking it, so all the design parameters and criteria for selectingexternal components (inductor, MOSFET, compensation etc.) need to bethose for a buck, not a boost design.

The switch current is the converter's output current, like a buck.Inductor value should also be chosen using ripple current, like a buck.Like a regular positive buck, the topology doesn't have aright-half-plane zero either.

If a voltage translation circuit is used, like the ones in Figures3 or 4, it's evident that compensation can get extremely flexible,since adding a pole or a zero is as easy as just adding a cap inparallel with either Rf1 (zero) or Rf2 (pole).

Hector Arroyo is a FieldApplications Designer at NationalSemiconductor Corp.

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