Co-processing platform for re-configuarble computing - Embedded.com

Co-processing platform for re-configuarble computing

Wind River Systems has released the single board computer (SBC) 405GP hardware reference design for prototyping and developing embedded applications that implement the latest field programmable gate array (FPGA) and CPU co-processing technologies.

The board speeds the implementation of FPGA/CPU co-processing hardware, as well as the testing and debugging of software.

Powered by IBMs Power PC 405GP embedded processor, the SBC 405GP reference design enables engineers to jump start system and software application development before their own co-processing hardware is available.

In co-processing designs, the CPU typically runs system applications while the FPGA manages other computationally intensive tasks, resulting in improved system performance. The FPGA hardware can be programmed with new functionality after the product has been deployed and this is what is often referred to as 're-configurable computing'.

The platform includes an FPGA daughter card co-developed with Xilinx that plugs onto the SBC 405GP motherboard, providing a high-speed link between the CPU and FPGA and which enables users to re-configure or re-program the application at any time.

The motherboard also supports a range of re-configurable PCI and PCI mezzanine cards (PMC) including several from Alpha Data Parallel Systems, allowing users to continuously upgrade the system with the latest FPGAs.The board comes with detailed schematics, VxWorks board support package, and pre-integration with all of Wind Rivers hardware-assisted development tools.

Published in Embedded Systems (Europe) February 2002

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.