Collaborators reveal results of embedded jitter project - Embedded.com

Collaborators reveal results of embedded jitter project

NICE, France — Fujitsu Microelectronics Europe (FME) and Toric Ltd have released the results of their collaboration to verify embedded jitter-suppressing macros based on Toric's patented AJC (Anti-Jitter Cell) technology.

AJC technology provides the foundation for Toric's (London) first product, PhaseFilter, a low-power, on-chip circuit for the suppression of jitter in clock signals.

The design uses only generic building blocks and so can be implemented in a wide range of semiconductor technologies. On a typical advanced mixed-signal CMOS process, with an operating frequency in excess of 1GHz, macros with a 2:1 tracking range and -150dBc/Hz plateau noise (far from carrier) are achievable.

PhaseFilter can enhance the performance of ICs in a range of applications including RF (LO) synthesis, serial communications, low-power PLLs and digital audio. Direct benefits include reduced system power and silicon area.

“These impressive results confirm the efficacy of our technology in such applications as low power PLLs and fast high-resolution data converters, said Professor Mike Underhill, Toric's research director.”Since these areas are central to FME's 'right-sized solutions strategy' we are pleased that their faith in our technology has been rewarded by such a positive result.”

FME's latest test chip, implemented in 90nm technology, demonstrates jitter suppression of 6:1 at 500MHz.Neil Amos, senior director engineering at Fujitsu Microelectronics Europe, added: “This implementation of Toric's AJC technology is a key milestone in FME's plans to deliver real customer benefits through the integration of PhaseFilter in future mixed-signal products”.

A reference design and simulation tools enable designers to incorporate Toric's AJC technology into their own products by creating, optimising and verifying embedded macros for jitter suppression which deliver high performance, with low power and are area-efficient.

AJC jitter suppression technology was conceived by Professor Underhill while at the University of Surrey and Toric acquired the related portfolio of intellectual property rights from the University in 2002. The University retains a minority interest in Toric.

First stages in the development of Toric’s technology were carried out with the support of successive grants from the U.K.’s Department of Trade, initially a 'Smart' award and later under the pan-European ‘Eureka!’ programme. Matching finance came initially from Toric’s management team and, later, from 'angel' investors principally based in and around Cambridge. Toric is still privately held.

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