Combining DSP & MCU operations in computationally complex time-critical calucations - Embedded.com

Combining DSP & MCU operations in computationally complex time-critical calucations

This “Product How-To” article focuses how to use a certain product in an embedded system and is written by a company representative.

Although digital signal processing is ubiquitous it is not alwaysvisible, as with digital cameras and mobile phones. A growing amount offunctions that are traditionally implemented using analogue circuits,are now contained in software on a microcontroller unit (MCU) or adigital signal processor (DSP), saving printed circuit board space andcomponents and therefore lowering costs.

The drift and tolerances common to analogue devices can also beavoided. The advantages of an integrated DSP unit for these softwarealgorithms are demonstrated by Fujitsu's MB91470/480 series ofmicrocontrollers.

Many of today's filters and algorithms could hardly be implementedusing analogue circuits, at least not without creating unjustifiableexpense. Today developers have to decide whether to use an MCU, DSP oreven both. Especially in applications where signal processing is onlyone task among others, this question is not always easy to answer.Controls and operating devices are classic to MCUs, whereas digitalfilters and regulators are typical of DSPs.

However, such a clear difference is not always so apparent withcontrol units often resorting to digital filters in order to evaluatesystem states and carry out fast loops. Fujitsu recognised this as thecase with motor control which is why it developed its MB91470/480 32bitMCU series with a powerful peripheral in the form of the µDSPalias MAC (multiply-accumulate) unit.

The µDSP has its own program and data memory enabling it toperform longer calculations as a coprocessor independent from the mainprocessor (CPU), as shown in Figure 1below. This allows the CPU to react quickly to interrupts alsoduring filter calculation, a feature that is necessary to industrialcontrol tasks, without changing the execution time for the filter.

Figure1: Block diagram of µDSP

The structure of the µDSP is optimised for multiply-accumulateinstructions typical for digital filters and many other algorithms,which it carries out at full processor clock speed (up to 80MHz) injust one cycle. A 72bit wide accumulator adds up the values, with thenumber format selected from various 32bit fixed-point formats.

Especially for digital filters the µDSP is able to transferinput variables through filter stages without the assistance of theCPU. As long as the µDSP is idle, the CPU has full access to allconfiguration and memory addresses of the µDSP, so that datatransfer to and from the CPU is possible. Once the calculations arestarted, a few status and control registers will remain accessible toindicate their operation status. When the µDSP has executed theprogram, it can generate an interrupt or trigger a DMA (direct memoryaccess) transfer.

Modern drive trains need power
Controlling a modern three-phase drive is one example of an applicationwhere numerous sub tasks need to be processed in fixed time intervals,which are determined by demands made on the system. Often, vector orfield orientated controls are used, consisting of several coordinatetransformations and cascaded control loops. Two current controllersform the innermost control loop and monitor the field- andtorque-creating components of the stator current.

This control loop is often cycled at the full PWM (pulse widthmodulation) frequency, which can be many tens of kHz. The set point forthe inner control loop is determined by a speed regulator, whichcontrols the required torque and thus acceleration via the current.This is then pre-connected by a positioning control. Therefore, thereare four control processes to be mastered in addition to thetrigonometric transformations of the vector control and the applicationitself.

If the time intervals for such a control are taken into account,some of the sub tasks can be performed in parallel. For example, thetime between scanning the actual current values and the next-possibleupdate of the PWM register with the new target values is typically aPWM period.

As a result of parallel calculation by the CPU and µDSPadditional functions can easily be implemented without increasing theeffective CPU load. The execution of a typical PID algorithm by the MACunit requires far less than a microsecond, which is why the µDSPcan take on further duties such as filtering input signals between twoPWM updates. Together with the MCU's flexible timers, very dynamicthree-phase drives can be implemented.

The MB91480 series can even achieve this for two motors. In thiscase, the MAC unit can take over all six PID control loops of bothmotors (the position loops often have additional functionality such asanti-hunt etc., which are easier to implement on the CPU), so that thebenefit, in terms of execution time becomes even more apparent.

Together with the flexible motor timer and ADC functionality of theMB91480 Series MCU, the timing for both motor controls can be optimisedin a way that minimises interference of peripheral usage. To reachthis, the PWMs for both motors are shifted against each other byapproximately one-fourth PWM period. By this, the ADC units can be usedto sample the phase currents of each motor simultaneously andsynchronised to the PWM, giving each control a time-slot of its own touse the peripherals.

After all currents have been sampled, the µDSP is triggeredand performs the PID calculations. Because of the short execution time,the control outputs are updated early enough before the first PWM needsthe values, so that the PWM can be updated to the new output voltagewith minimum delay. In other words, the response time of the firstmotor control is not influenced by adding a second; both can still beserved with the full PWM frequency of 20kHz.

In order to map control loops efficiently on DSP-like structures,certain requirements must be fulfilled. First of all, mostmicrocontrollers and DSPs are not equipped with a floating point unit,so fixed-point arithmetic is used instead. However, the structure ofthe regulator can also be optimised.

With some reforming, typical discrete PID regulators can betransferred to an IIR (infinite impulse response) filter-likestructure. This implementation also avoids the summation of theintegral term. It features a 'sum of products' form, typical to digitalfilters and for which the µDSP is optimised.

Figure2: FIR8 filter

µDSP instead of RC
In many applications it is necessary to evaluate analogue readings, butinterference such as noise can prove a problem. This is often reducedwith analogue low-pass filters, but can also be achieved digitally.Analogue anti-aliasing filters are necessary for nearly every ADtransformation as a matter of principle, but digital filtering canflatten the requirements for the analogue pre-filters by over-sampling.

This utilises a greater sampling frequency than that which is necessaryaccording to Nyquist's theorem (the minimum sampling rate required toavoid aliasing, which is equal to twice the highest signal frequency)in order to achieve the necessary bandwidth. As a result a simplerfilter, with low edge steepness, can be used where the limitation tothe target frequency range together with a reduction of the samplingrate is digital, thus avoiding extra circuit complexity.

Commonly used filters . TheFIR (finite impulse response) or IIRare the most commonly used filters. FIR filters are non-recursive asthere is no feedback of output to input. Therefore they are alwaysstable, generating finitely long output signals. In contrast, IIRfilters can resonate and become unstable, but often need fewer filterstages in order to achieve a specified behaviour. Because theµDSP carries out filter calculations on its own, an easy-to-useFIR filter can often be used without increasing the CPU load (Figure 2, above ).

The 'moving average' filter is a typical simple FIR filter. It iscommonly used as a simple low-pass filter providing smooth measuredreadings. All filter coefficients have the same value and are usuallyscaled (normalised) in such a way that the sum of the filtercoefficients, representing the DC gain of the filter, equals unity. TheµDSP of the MB91470 can calculate such a filter with 64 stages inapproximately 1.2 microseconds. Therefore the full sampling rate ofboth 12bit ADCs in the MB91F479 can be used with this filter, orseveral shorter filters can be calculated at the same time.

Christian Harders is an ApplicationEngineer in Industrial Marketing,  FujitsuMicroelectronics Europe

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