Component and RGB video routing, clamping and sync extraction - Embedded.com

Component and RGB video routing, clamping and sync extraction

Clamping and routing high-speed component video (YPbPr) as well as RGB with Sync-on-Green (SoG) is a difficult task. The high-speed, pulse-like nature of these signals requires a fast amplifier and clamping mechanism. But there is a way to route and clamp component (480p to 1080p resolution) analog video as well as RGB with sync-on-green. For the various video resolutions from 480p to 1080p, the synchronization information is contained on the luma (Y) or green channel (G). 480p is a standard definition (SD) resolution that features a bi-level sync. 720p, 1080i, 1080p are all high-definition (HD) signals that feature a tri-level sync. This solution can handle both types of synchronization pulses, as well as high-speed 1080p signals — although it is rare to see that resolution transmitted in analog form. Typically, 1080p is only transmitted in the digital HDMI format.

A complete video driver solution should include a mux, a triple driver amp, and sync separator, ideally with the mux and triple driver amp in the same package. The triple 4:1 video mux provides an excellent way to route high speed RGB (with SoG) and YPbPr video signals. The mux allows for an array of signals to be channeled through the same system. They commonly accommodate six to 12 input signals, i.e., two to four sets of video signals. The amp drives the selected video signals into a 150 Ω video load.

The device features a keyed clamp that sets the video signals to the voltages set at the reference pins. Clamping allows the video mux to set the DC level of the video signals to an ideal point to help optimize the signal for signal processing further down the chain. Also, using DC-blocking caps helps protect the device from potentially damaging DC currents.


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Figure 1: Intersil's ISL59451 combines a mux and triple driver amp on a single device, shown here in a typical example

REF_G sets the clamping voltage for the green channel, while REF_RB sets the clamping voltage for the red and blue channels. Driving CLAMP low for all three channels activates the clamp. The question then becomes: “Where do I get the sync signal to drive the CLAMP pin?”

Next: Driving the CLAMP pin
Driving the CLAMP pin
The answer is simple: by using a video mux in combination with a sync separator. A sync separator outputs the synchronization pulses embedded in either the luma or green channel. These pulses are used to drive the CLAMP pin of the combination mux-driver amp.


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Figure 2: ISL59451 + ISL59885 Solution

As long as the references for the video mux are set greater than 50mV then the CLAMP pin may be driven by the composite sync output of a sync separator.

It is important to use the CSYNC output of the sync separator and not HSYNC; because the HSYNC pulse-width is too wide for use with high-definition (HD) tri-level sync signals.

Figure 3 indicates why the HSYNC output cannot be used. The wider HSYNC clamp pulse causes unacceptable overshoot in the output of the video driver.


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Figure 3: 720p HSYNC Distortion

Figure 3 also shows that the output of the combined mux-video driver IC, in this example, Intersil's ISL59451, does not clamp to the correct voltage when an incorrect clamp signal is used. This can potentially cause a distorted image on the monitor, or a loss of sync.

Next: 720p, 480p, 1080p video
720p video
Figure 4 and 5 show how well this solution, with CSYNC of the sync separator, works as a keyed sync tip clamp for high-definition (HD) 720p video signals. For simplicity, the Pr and Pb signals are not shown.

The reference level is set to +500mV and the bottom of the sync tip for the integrated mux-video driver clamps to that voltage.


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Figure 4: 720p video


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Figure 5: 720p Video Zoomed In

480p and 1080p signals are also supported. For simplicity, the Pr and Pb signals are not shown.


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Figure 6: 480p video


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Figure 7: 1080p Video

Figure 8 shows that even with high-speed 1080p video, the clamping circuit is still accurate; making the video driver solution a robust one.

The CSYNC output of the sync separator is a high-speed comparator output, and therefore its delay (35ns) is small compared with the speed of even 1080p signals.


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Figure 8: 1080p video — clamp accuracy

Figure 8 also shows that the dc restore of the mux-triple driver amp only mildly distorts even the fastest video signals. The distortion of the sync tip will not cause loss-of-sync or in any way degrade the quality of the image.

Be sure to bypass each device's power pins properly and keep the trace connections between the two devices short to minimize reflections and noise.

Next: Generating a CLAMP signal from HSYNC
Generating a CLAMP signal from HSYNC
This article focuses on embedded composite sync signals, but what if you need to generate a clamp signal from a traditional VGA computer signal? PC video cards output discrete H and V syncs, and the video signal is always low during horizontal blanking, so HSYNC should work perfectly as clamp signal. There's one catch, though: the HSYNC polarity varies depending on video mode.


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Figure 9: Active-High HSYNC polarity converter

This simple circuit in Figure 9 detects the polarity of the incoming HSYNC signal and inverts it when necessary to guarantee a positive sync/clamp signal. The first XOR (U1A) buffers and level shifts (PC sync signals may have 5V or 3.3V swings) the HSYNC signal. Its output goes to one input of U1B and to the low pass filter formed by R1 and C1. Its 0.1s time constant averages the HSYNC signal. All standard HSYNCs are ~20% or less of the line period, so the output of the filter will be a maximum DC voltage of 0.2*3.3V = 0.7V (for an active low HSYNC) or a minimum of 0.8*3.3V = 2.6V (for an active high HSYNC). This inverts or does not invert the signal on the other input to U1B as needed to guarantee a positive polarity HSYNC (CLAMP) signal at the output of U1B. The same circuit can be used to polarity correct VSYNC if desired.


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Figure 10 and Figure 11 show the input and output to the circuit.


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Figure 11: Active-High HSYNC Polarity Converter (PINK = INPUT, GREEN = OUTPUT)

If an active-low, HSYNC pulse is needed for clamping, simply replace the XOR with an XNOR.


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Figure 12: Active-Low HSYNC polarity converter

About the author
Navid Mostafavi is a video applications engineer with Intersil Corporation. He holds a BSEE from UCLA and is now at work on his MSEE at San Jose State University. He can be reached at .

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