STMicroelectronics' latest family of address-data multiplexed I/O (AD MUX I/O) devices complete a family of NOR flash-memory solutions tailored specifically for cost-efficient mobile platforms.
The AD MUX I/O architecture introduces pin sharing between data and addresses, reducing the number of pins required by the memory chip and consequently saving cost.
The part's architecture allows either an increase of data bus width with no pin count increase or a reduction in pin count without loss of performance. A smaller package and reduction in pcb size lowers costs for handset makers.
The family includes both standalone and subsystem solutions, based on 1- and 2-bit/cell technology, and offers burst mode and multiple bank architectures. Available packages include LFBGA88 (8 by 10 mm), LFBGA107 (8 by 11 mm), or VFBGA44 (7.5 by 5 mm). The standalone NOR Flash memories range from 16 to 64 Mbits in 1-bit/cell technology, and from 128 to 256 Mbits in 2-bit/cell technology. Samples are available now, with volume production planned for the third quarter. More information is available at www.st.com.