SAN JOSE, Calif. Transmeta Corp. officially launched its second-generation x86-compatible notebook processor at the recent Microprocessor Forum. One of the few technical details the company reserved for the launch was an updated power management scheme used in the Efficeon that mitigates current leakage in the CPU.
Transmeta has been working on Efficeon for four years. The part is widely seen as a make-or-break bid by the company to upgrade its first-generation Crusoe. Although a handful of thin-and-light notebooks and other systems adopted Crusoe, the CPU failed to get broad acceptance due to its subpar performance.
The company believes it has solved that problem by extending its 128-bit VLIW processor to a 256-bit wide engine that can issue up to eight VLIW instructions per clock. Efficeon also includes a 1 Mbyte L2 cache and support for the Intel SSE and SSE2 multimedia instructions sets. The chip, now ramping in a 130-nm process from Taiwan Semiconductor Manufacturing Co. Ltd., will run at speeds from 1-1.3 GHz when it ships later this year in versions consuming from 5 to 14W.
Dave Ditzel, Transmeta's chief technology officer, said Efficeon will offer similar systems-level performance as Intel's Centrino but cost about half as much, consume one-eighth Centrino's power when in idle mode and have a significantly smaller footprint.
However, to date it is not clear whether the company is gaining additional traction with its mainstream notebook OEMs. Sharp and Fujitsu, who use the Crusoe in limited notebook models, showed Efficeon development systems at the launch, but no OEMs announced plans to ship Efficeon-based systems.
Gregory Nakagawa, general manager for Sharp America, said the company plans to use Efficeon next year in an upgrade of its model MM10 notebook which uses the Crusoe. Sharp currently has no active plans for the part in other notebooks.
Because Efficeon is not pin-compatible with Centrino, OEMs will have to design new motherboards for the CPU, another hurdle to acceptance. Moreover, only two south bridge chips, one from Nvidia and one from ULi Electronics Inc., currently support Effusion's HyperTransport interconnect.
Given Transmeta's past problems delivering Crusoe processors, some OEMs may wait until the company delivers planned 90-nm versions of Efficeon to be made by Fujitsu and available sometime in 2004. Those parts are expected to hit speeds up to 2 GHz and power dissipation as low as 5W.
Nevertheless analysts were upbeat about Transmeta's prospects. “Intel's Centrino is positioned as a premium product, and there's a lot of room underneath them for something with equal performance and a much lower price,” said Nathan Brookwood of market watcher Insight64 (Saratoga, Calif.).
Transmeta will have to compete in this market segment with Advanced Micro Devices, which is already capturing design wins with a mobile version of its Athlon chip and Via Technologies (Taipei) which launched its C5P earlier this week, a part with roughly similar performance, power and footprint characteristics as Efficeon. While the Efficeon will cost about $100, the Via CPU will be priced under $50.
Transmeta, which has to date run in the red, needs revenues of about $45 million per quarter to break even. A design win in a single model of a top-tier OEM's mainstream notebook line could generate sales of as much as $6 million, according to the company.
One ace-in-the-hole for Transmeta is an upgrade version of its power management technology. LongRun2 sports a new capability for dynamically adjusting a processor's threshold voltage to reduce power leakage. The software will not ship in the first generation 130-nm Efficeon parts but follow at a later date unspecified by the company.
Ditzel positioned LongRun2 as a potentially broad solution to leakage problems that are emerging in chips made at the 90- and 65-nm nodes. “As far as we can tell, we think we have a unique solution to the leakage problem,” he said.
Transmeta CEO Matt Perry suggested the company might license the technology. He noted Transmeta has already sealed two small intellectual property deals for other technology.
Ditzel showed a demonstration in which LongRun2 adjusted threshold voltage on a CPU to virtually eliminate leakage current, taking power consumption in idle mode down from 144 to just 2mW. The company did not detail how the technique works, although Ditzel did say it depends on both hardware circuitry already in Efficeon and the software that is still in development.