Czech input eases ESL use for reconfigurable processors - Embedded.com

Czech input eases ESL use for reconfigurable processors

LONDON — Four years of research in the Czech Republic has enabled Celoxica, the Abingdon based developer of electronic system level (ESL) design tools, to set up a deal Atmel that extends the use of its tools for the design of a family of dynamically reconfigurable processors currently under development and based on the FPSLIC technology.

The DK Design Suite and Agility Compiler will be used to synthesise hardware accelerators from highly complex algorithms described in C or SystemC. Celoxica will also provide its HW/SW co-design technology and board-level integration technology to provide a seamless implementation flow. The tools allow for dynamic reconfiguration.

The tools should meet a need for on-demand, on-the-fly software and hardware programmability which is becoming increasingly integrated and pervasive in modern systems development.

Researchers from the Czech Republic Academy of Sciences' Institute of Information Theory and Automation (UTIA) collaborated with both Atmel and Celoxica to define and prove the flow from algorithm to implementation. Jiri Kadlec, head of the Department of Signal Processing at UTIA, said, “By utilising using C-based design and synthesis from Celoxica we have demonstrated ease of design and lower cost of design coupled with production grade implementation.”

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