Design engineers have traditionally used both oscilloscopes and logicanalyzers to test and debug mixed-signal embedded designs based oneither MCUs or DSPs. But a new class of measurement tools called mixed-signaloscilloscopes (MSOs)offer many advantages for debugging embedded designs.
An MSO is a hybrid test instrument that combines all of themeasurement capabilities of a digitalstorage oscilloscope (DSO) with some of the measurementcapabilities of a logic analyzer into a single synergistic instrument.With an MSO, you can see multiple time-aligned analog and digitalwaveforms on the same display Figure1, below .
|Figure1: With a mixed-signal oscilloscope, you can see time-aligned analogand digital waveforms on the same display.|
MSOs typically lack the advanced digital measurement capabilitiesand the large number of digital acquisition channels of full-fledgedlogic analyzers; the relative simplicity of MSOs allows them to avoidthe complex use model associated with operating full-fledged logic analyzers .One of the primaryadvantages of an MSO is its use model.
You use an MSO in much the same way you use an oscilloscope. Andbecause MSOs are highly integrated, they are much easier to use thanloosely tethered two-box mixed-signal measurement solutions. A good MSOshould be user-friendly, provide fast waveform update rates and operatemuch like an oscilloscope – not like a logic analyzer.
|Figure2: A mixed-signal embedded design generates analog 'chirp' outputsbased on analog, digital and serial I/O.|
Embedded 'chirp' design
Figure 2 above shows a blockdiagram of anembedded “chirp“ product developed by Solutions Cubedfor an embedded industrial application. At the core of thismixed-signal embedded product is aMicrochip PIC18F452-I/PTmicrocontroller that operates on an internal 16bit instruction set. Since this particular MCU has an internal busstructure and includes an embedded ADC, this mixed-signal device andits associated external circuitry is a perfect candidate for turning onand then debugging with an MSO.
The ultimate goal of this design is to generate analog chirp outputsignals of various lengths, shapes and amplitudes based on a variety ofanalog, digital and serial I/O conditions. A chirp is an RF pulsedanalog signal consisting of a specific number of cycles often found inaerospace/defense and automotive applications.
The MCU simultaneously monitors the following three analog anddigital inputs to determine the analog characteristics of the outputchirp signal that it needs to generate:
1. The status of the usercontrol panel is monitored with one of the MCU's available paralleldigital I/O ports to determine the shape of the output-generated chirpsignal (sine, triangular or square wave).
2. The output level of anacceleration analog input sensor is monitored via one of the MCU'savailable ADC inputs to determine the amplitude of the output-generatedchirp signal.
3. The status of the serialI2C communication link is monitored with the MCU's dedicated I2C serial I/O port to determinethe number of pulses to be generated in the output chirp. This I2Ccommunication input signal is generated from another intelligentsubsystem component from within this embedded design.
Depending on the status of these three analog, digital and serialinputs, the MCU generates a series of parallel output signals to anexternal 8 bitDAC to createanalog chirp signals of various amplitudes, shapes and lengths. Theunfiltered stair-step output of the DAC is then fed through an analog low-pass filter to smooth theoutput signal and reduce noise.
This analog filter also induces a predetermined amount of phaseshift to the output signal. Finally, the MCU generates a paralleldigital output via another available digital I/O port to drive an LCDdisplay that provides system status information.
Step by step
The first step in designing/ programming the MCU in this design was toconfigure the MCU's I/O for the appropriate number of analog anddigital I/O ports. You can trade the number of analog I/O ports fordigital I/O ports and vice versa in this particular MCU from Microchip.
Before attempting to code the MCU to monitor various inputs andgenerate the final specified output signals, we decided to firstdevelop test code to turn on one section/function of this embeddeddesign at a time and verify proper operation and signal integritybefore adding interactive complexity.
The first section/function we turned on and debugged was theexternal output DAC and analog filter. To verify proper operation ofthis circuitry and internal firmware, we initially coded the MCU togenerate a continuous/repetitive sine wave of fixed amplitude,regardless of the input control/ status signal conditions.
|Figure3: The MSO captures parallel digital input and analog output of anMCU-controlled DAC.|
Figure 3 above shows a screenimage from an MSO that captured the continuous digital outputs of theMCU's digital I/O port (blue/bottomtraces ) that drives the digital inputs of the external DAC. Inaddition, we can see the time-aligned stair-step output of theconverter (yellow/toptrace )and the analog-filtered output signal (green/middletrace ).
Since this particular signal was a relatively low-level outputsignal using only 16 levels of the 8 bit DAC (256 levels max.), we caneasily view the unfiltered/ stair-step output characteristics of thisconverter on the oscilloscope's display.
We set up this particular acquisition to trigger when the DAC'soutput reached its highest output level (center screen). Triggering atthis particular point using conventional oscilloscope triggering wouldbe impossible, since scope triggering requires edge transitions – it isimpossible to trigger at the “top” of a signal with a scope.
To trigger at this point/phase of the output signal, we establisheda simple one-level pattern trigger condition based on the digital inputsignals of the DAC (outputs of the MCU I/O port) that were coincidentwith the highest output analog level of the external converter. Totrigger at this precise point in the waveform, we entered a parallelbinary pattern of “HHHL LHHL” for triggering.
Since this MSO uses “qualified” pattern triggering, the scope alwaystriggered at the beginning of the specified pattern. It never triggeredon unstable/transitional conditions because it requires that the logiclevels be stable for a minimum of 2 nanoseconds (ns), and then triggersonly when a stable pattern is entered.
Note that some mixed-signalmeasurement solutions/options will trigger whenever a specified patterntrigger condition is present. This means that they might trigger duringthe middle of a pattern, or possibly during a transitional/switchingstate. Without “qualified” pattern triggering, the result will beunstable triggering.
|Figure4: The MSO triggers at the 50 percent crossing point using acombination of analog and digital pattern triggering.|
Figure 4, above shows atrigger setup condition of the MSO that provided triggering preciselyat the DAC's 50 percent output level. We achieved this by using patterntriggering on the parallel digital input signals in addition to ananalog trigger condition. Keep in mind that not all MSOs/mixed-signalmeasurement solutions permit combined mixed-signal triggering on bothanalog and digital conditions.
But with two analog output conditions at the same level (50 percentrising level and 50 percent falling level), triggering coincident witheither the rising or falling point required more than just patterntriggering on the 8 bit input pattern.
With the addition of qualifying on a “low” level on analog channel2, the scope was able to trigger at the desired phase using acombination of analog and digital pattern triggering. Note that analogsignals are considered “high” when they are above the analog triggerlevel, and “low” when they are below the trigger level. Also shown inFigure 4 are automaticparametric measurements including amplitude,frequency, as well as the phase shift of the filtered output signalrelative to the stair-step output of the DAC.
After turning on and verifying proper operation of the external DACand analog filtering circuitry, the next step in this design/turn-onprocess was to generate a specific number of non-repetitive sine wavepulses (chirps) based on a serial I2C input.
|Figure5: Conventional oscilloscope edge triggering fails to synchronize onspecific-length chirps.|
Figure 5 above shows anoverlay (infinite persistence)of various length chirps using standard oscilloscope edge triggering.With conventional oscilloscope edge triggering, it is impossible toqualify triggering on specific-length chirps.
Using the MSO's I2C triggering capability, the scope was able tosynchronize acquisitions on specific serial input conditions thatinstructed the MCU to generate specific-length (number of pulses)output chirps.
|Figure6: The MSO can trigger on a 3-cycle chirp with I2C triggering onspecific serial address and data content.|
Figure 6 above shows theMSO's ability to trigger on a three cycle chirp with I2C triggering onspecific serial address and data content, and Figure 7, below , shows the scope'sability to trigger on a one-cycle chirp. Digital channels D14 and D15(top two blue digital traces) were defined as the I2C clock and datainput triggering signals, respectively.
|Figure7: Figure shows triggering on a 1-cycle chirp I2C with triggering in anMSO.|
We could have defined any of the 16 digital or two to four analogscope channels to serially trigger on these two serial input signals.While monitoring the serial input and analog output signals, D0 throughD7 were set up to monitor the DAC input (MCU output) signals (bottomeight blue and red digital traces)as shown in Figures 6 and 7.
We could have set up another analog channel for the oscilloscope tosimultaneously probe, acquire and trigger the MSO based on theadditional analog input signal from the input analog accelerationsensor, which determines the output signal amplitude. In addition, wecan utilize unused MSO digital channels to monitor and/or furtherqualify triggering on the digital control panel inputs or the LCDoutput driver signals.