Design high-speed PCBs using a parallel design methodology - Embedded.com

Design high-speed PCBs using a parallel design methodology

Higher speed and integration in smaller devices has been the trend incomputing, communications and consumer electronics in recent years,thus posing a huge challenge to PCB design. This article describesprinted circuit board (PCB)parallel design using  a mobile-phone example.

The PCB designprocess canbe divided into different stages: netlistimporting, packaging, master designing (layout design, macroplacement), physical and electric constraints analysis, placement,routing, design quality control and design export.

Among these design processes, placement and routing are the mostdifficult. To address the efficiency requirements of placement androuting, the use of a parallel design method is highly recommended.

Parallel design procedures are similar to placement and routing,with the design object as the only difference.

Design constraints
Placement analysis begins with mechanical design constraints andelectric topology. Mechanical design constraints include boardgeometry, dimension requirements, hole and position mounting, heightlimitations for special components and placement area requirements.

Figure 1 below shows adesign example of a cellphone's main board.There are clear differences with each circuit block. Placement can beexplored based on signal flow. Electric and magnetic shields as well aselectromagneticcompatibility (EMC) requirements should beguaranteed.

Figure1: Placement of circuit blocks can be explored based on signal flow.

For a reliable and stable product, signal integrity must also beconsidered. Based on the sample analysis, we can deduce a paralleldesign method. It involves exploring by circuit topology as well asassigning suitable placement area and qualified engineers. Roleassignment The task in Figure 1 above can be broken down among thefollowing groups:

1. Virtual communication protocolgroup -This includes RF modules(power amplifier, transceiver and transducer), mixed-signal components,regular analog and logic chips, and baseband processor.

2. Virtual applications group – This includes LCD/backlight driver,graphics processor, application processor, RAM, flash and memory card.

3. External virtual signal group -This includes external interface,power supply and management, and clock module. If each parallel stagerequires an engineer to finish it, the role assignment can berepresented in Figure 2, below.

Figure2: The task can be divided among three engineers dealing with differentvirtual communication protocol, virtual applications and externalvirtual signal tasks.

Engineer A is in charge of the whole placement and placement for thevirtual communication protocol group. Engineer B is in charge of theplacement of the virtual applications group, while Engineer C is incharge of the external virtual signal group. This role assignment takesadvantage of every engineer's special skill.

Figure3: Role assignment takes advantage of each engineer's skill andspecialty.

Figure 3 above is agraphical representation of the parallel designflow. Engineer A completes the master design after importing thenetlist, doing the mechanical design, hole position mounting, dividingthe whole design into blocks with different signal features anddocumenting the task assignment. Engineer A would then turn over theschematic design, bill of materials,task assignment documents and PCB master designto Engineer B.

Engineers would complete their assigned design tasks after etchingoff some components, exporting their sub-placement file and submittingit to Engineer A through PCB editor tools.

Engineer A imports the twosub-placement files to the subplacement design through PCB editortools; Engineer A does the final placement editing and optimization.Figure 4 below is part of theparallel mobile-phone design result insilkscreen.

Figure4: The parallel method explores the different area partitions andsignal flow, as well as routing priorities.

Routing analysis begins with circuit topology and electric-signalanalysis. An electric signal can be restricted or non-restricted. Thedifference between routing and placement is the file type.

With the mobile-phone example, the method explores the differentarea partitions and signal flow, as well as routing priorities toensure that project cycle meets design feature requirements. Thus, aparallel design method can achieve the design goal with availableresources.

Kelven Li, is Senior SystemHardware Engineer in the EDA departmentat  ProcessTechnologies Co. Ltd

For a PDF version of this article go to Designhigh-speed PCBs using parallel method.

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