Design tools for 3D ICs remain a challenge
As Demler points out, there are very substantial challenges to developing a full suite of tools; from floor-planning and system estimation through detailed place, route, DRC, and extraction of nets that include TSVs and interposers. Today the best solutions involve rock-solid 2D tools, chewing gum, and bailing wire, mixed with a great deal of expertise. Therein roosts the chicken, or lies the egg: your choice. The EDA vendors with the ability to integrate a full 3D flow won't move until they see a market, except perhaps to insert some hooks into their open database structures. The start-ups who will move quickly can only do point tools. And until there is an integrated flow there won't be a large market. So once again it will probably fall to TSMC and the Common Platform Alliance to set the schedule on a vital new technology. Please give Michael's report a read and let us know what you think, and where your team stands on the 3D IC question.