DESIGN TOOLS: System eyes hardware-assistance hurdles -

DESIGN TOOLS: System eyes hardware-assistance hurdles


San Francisco — Cadence Design Systems Inc. believes its next-generation series of Incisive Xtreme accelerators/emulators, being introduced this week, can remove the traditional barriers to mass adoption of hardware assistance by design teams.

Adoption of emulation/acceleration has been spotty at best thus far, partly because of the cost of the tools and the need for specialists to use them. But the market is changing, according to research firm Gartner Dataquest. Chip makers are increasingly employing emulation and acceleration at the front end of the design cycle, at the expense of verification emulation and acceleration at the back end, according to the company, which predicts that the trend will continue indefinitely.

Some 70 percent of today's design teams need hardware-assisted verification, but only 10 to 20 percent have ever had access to it, said Steve Glaser, corporate vice president of marketing for Cadence's verification division.

“Not only is the demand there, but we've proven that we have brought this technology to a state of maturity where it's ready for broad deployment,” Glaser said.

According to Cadence, Xtreme III systems have been developed with the designer in mind. Rather than target system validation specialists working in a lab environment, Xtreme III was made for the average designer, “engineered for the cubicle” without special power requirements and providing a simulation-like, event-driven environment.

Xtreme III supports as many as 72 million gates in a single chassis.

Cadence already dominates the markets for both design and verification emulation and acceleration. According to Dataquest, in 2004 (the last year for which figures are available), Cadence held more than a 56 percent share of the verification emulation/acceleration market through its Palladium series of emulators. In the same year, Cadence's market share for design emulation/acceleration was more than 79 percent, according to Dataquest.

The market for emulation and acceleration targeting design teams was worth roughly $79 million in 2004, according to Dataquest, which projects the market will grow to more than $103 million this year and more than $165 million in 2009. On the other hand, Dataquest expects the market for verification emulation and acceleration to shrink as companies implement this technology at the front end of the design flow and use server farms for simulation. After topping out at $121 million in 2002, Dataquest predicts, the verification emulation/acceleration market will shrink to just over $50 million by 2009.

Glaser believes the design team side of the market could actually experience greater growth. He described several barriers to the adoption of emulation and acceleration, each of which Xtreme III is said to overcome. The first and most significant, Glaser said, is ease of adoption; many companies, particularly startups, simply cannot afford to maintain a separate team of emulation/acceleration specialists. Xtreme III overcomes this, Glaser said, by providing the technology in a format that is easily understood and used by simulation-savvy designers, and in a form factor that allows it to be used from the desktop.

Integration edge
Another barrier to the adoption of acceleration and emulation has been a lack of integration into evolving simulation-based verification flows, according to Glaser. He believes Cadence has solved that problem by providing integration with other Cadence tools and libraries.

A further trend that bodes well for emulation and acceleration is the position of leading chip makers on respins at the 65-nanometer node. According to Handel Jones, CEO of International Business Strategies Inc., chip makers chose to rush into 90 nm with an emphasis on getting to first silicon, content to do a respin afterward. But at 65 nm, Jones said, chip makers are striving for zero respins.

“If you look at respins, a lot are due to complexity,” said Glaser, noting that emulation is superior to simulation for ensuring the viability of designs featuring large data streams and embedded software.

Cadence acquired the Xtreme product line last year when it bought Verisity Ltd. Cadence has spent the past 18 months enhancing the tool and developing integration between it and other Cadence tools, including Incisive Design Team Manager and SimVision, according to Ran Avinun, marketing group director for the Incisive platform. Xtreme III also features an enhanced compatibility mode that emulates Cadence's Incisive Design Team Simulator and supports its compile scripts, Avinun said.

Xtreme III features a new concurrent mode that enables designers to run transaction-based acceleration environments with SCE-MI 1.1 approaching maximum speed, according to Avinun. Users can also access the Incisive Assertion Library, popular bus protocol transactors and a library of SpeedBridge rate adapters, he said. The system also incorporates a “hot swap” feature that is said to enable instantaneous switching from simulation to or from hardware.

According to Avinun, Xtreme III is able to achieve a high degree of performance because of its architecture, which is based on reconfigurable computing technology and behavioral processors.

Despite the performance capability of Xtreme III and the predicted demise of verification emulation and acceleration, both Glaser and Avinun said Cadence does not believe that Xtreme III will cannibalize the market for Palladium. Indeed, they said, many companies use both products.

As part of Cadence's product segmentation strategy, Xtreme III is being offered in two tiers: the entry-level Xtreme III desktop, which supports simulation, acceleration and targetless emulation, and Xtreme III System, which adds in-circuit emulation capabilities.

Both systems can accommodate up to 12 users simultaneously.

Cadence did not provide exact pricing information, but Avinun said the entry-level product is priced at less than $100,000 for a six-month license.

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