Jitter considerations when matching timing solutions to your applications
Whether you are sitting at a computer, working on a tablet, talking or surfing on a cell phone, sending data over a network, performing digital signal analysis, or controlling an industrial robot, crystal oscillators or clocks embedded in all these products deliver stable clock signals that provide the heartbeat of just about every digital product. These products also span a wide range of frequency and stability requirements depending on the industry they are employed in.
For example, telecommunication, network systems, and test systems have some of the most stringent specifications for frequency stability and low jitter, while personal computing, medical instruments, and industrial systems also have tight specs, but not quite as tight as the first grouping. Lastly, consumer products such as audio/video systems, appliances, smart home and wearable fitness devices have, perhaps, the least stringent clock stability and jitter requirements.
Many embedded processors and microcontrollers have on-chip clock generators that just require an external crystal to provide a relatively-stable clock signal. However, if timing accuracy and low jitter are critical for the system, the on-chip clock generator can be bypassed and an external clock source can be added to provide a more stable, lower jitter signal. In many systems, the processor is only one of many ICs that require a clock signal – and to meet such system needs, a clock generator that delivers multiple clock outputs, each configurable to meet the needs of each of the timing requirements for the other chips can be used. Such a solution can end up replacing multiple crystals, thus saving board space, reducing power consumption, and lowering system cost, and, of course, providing more accurate and stable clock signals.
When transmitting a digital bit stream (a clock timing signal or a serial data stream) between two points, small variations in that timing signal due to imperfections in the transmitter, the channel, or the receiver, cause slight shifts in the signal timing. These timing errors are referred to as jitter (Figure 1). There are some common definitions of jitter that appear in various specification documents. For example, in the SONET communications specification jitter is defined as the short-term variations of a digital signal’s significant instants from their ideal positions in time (a significant instant might be the optimum sampling instants). Alternately, in the Fiber-Channel specification, jitter is defined as the deviation from the ideal timing of an event. The reference event is the differential zero crossing for electrical signals and the nominal receiver threshold power level for optical systems.
Figure 1. Jitter shows up in a digital signal as a deviation from the ideal event timing and can be either a negative amount that shortens the unit interval, or a positive value that increases the unit interval.
Although the two definitions have some differences, they both have a common fundamental point – jitter has to do with the time difference between the ideal and actual occurrence of an event. That event could be the rising and falling edge of a clock signal, the optimum sampling instant of an NRZ encoded data stream, the zero-crossing of a differential signal, or some other event. Jitter can also be considered as unwanted phase modulation of a digital signal. Thus jitter characterization is essential for guaranteeing an acceptable bit-error-rate (BER) for the system since the jitter can affect timing margins and synchronization, as well as potentially causing still other problems.
Jitter can be classified into two basic types – random jitter and deterministic jitter. Random jitter (RJ) is unpredictable and is characterized by a Gaussian probability density function. When viewed using an eye pattern, the RJ shows up as “fuzziness” in the switching waveform (Figure 2a). Deterministic jitter (DJ) can be predicted (as long as one knows the bit stream characteristics), and has definite amplitude limits, and in an eye pattern, it shows up as discreet bands in the switching waveform (Figure 2b). RJ is caused by thermal or other random noise effects that occur in the system and these thermal effects are induced into the phase of the clock and data signals. DJ is a result of process or component interactions in the system, such as the effect of limited bandwidth on specific patterns of 0’s and 1’s in the serial bit stream. Thus, jitter is an important performance measurement for both clock and data signals in a serial link. Jitter in different parts of the serial link is additive and can thus increase the total jitter such that data errors can occur when the event timing points shift past the intended boundary.
|Figure 2. Eye patterns help visualize the effect of jitter on the digital switching signal. For random jitter, the effect appears as a “fuzziness” signal waveform (a), while for deterministic jitter, the effect appears as discrete “bands” in the switching waveform (b).|