Flash 101: Errors in NAND Flash
Program Disturb Error
A program disturb error, caused by cell-to-cell programming interference, is another correctable error in NAND Flash. As explained previously, a high voltage is applied across the memory cell for program and erase operations. Due to parasitic capacitive coupling, the adjacent cells also receive an elevated voltage stress that can alter the threshold level of these neighboring cells. This unintentional shift in threshold level due to program or erase operations in known as a program disturb error.
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Figure 2: A program disturb error occurs from an unintentional shift in the threshold level due to program or erase operations.
A program disturb error affects cells in both selected and unselected pages, but only in the block being programmed. The parasitic capacitive coupling between adjacent cells increases with shrinking lithographic node, the same reason the Raw Bit Error Rate (RBER) increases for smaller lithographic nodes. To recover from this error, the block needs to be erased after copying its contents to another block.
Over-programming is another correctable error in NAND Flash. While programming, the threshold voltage of some cells can go too high. As explained in the previous sections, memory cells need to be turned on or unselected for read and program operations. Cells with a very high threshold voltage will not turn on as expected when readout voltage is applied. This can result in incorrect read and program operations for other pages in the string. This is known as an over-programming error.
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Figure 3: An over-programming error occurs when the threshold voltage for a cell goes too high, which causes the cell not to turn or be selected during read and program operations.
Over-programming errors are often caused by memory cells that hold a higher initial charge on the floating gate due to an improper erase operation. They also occur when memory cells are nearing a worn out state. To recover from this error, the block need to be erased after copying the contents to another block.
The data stored in Flash memories tend to get corrupted over time. This is known as a data retention error. Retention errors are caused by loss of charge stored in the floating gate. Even though the gate oxide is an insulating layer, electrons stored in the floating gate still leak through it from time to time. With longer durations, the loss of charge accumulates, eventually changing the programmed state of the cell and causing a data error. To recover from this error, the block need to be erased after copying the contents to another block.
Retention errors can happen to any cell in any block of the Flash memory. Due to wear of the oxide layer, memory cells with more program erase cycles are more likely to experience retention errors. Temperature is another factor which contributes to retention error; the higher the temperature, the greater the chance for a retention error. In MLC, TLC, and QLC memories that store more bits in each memory cell, the cells with more programmed electrons (closer to binary 0) are more prone to leakage of charge. Retention errors depend on many aspects of the Flash manufacturing technology such as lithographic node, oxide thickness, and so on. Data retention is a key parameter in all Flash datasheets.
Avinash Aravindan is a Staff Systems Engineer at Cypress Semiconductor. His responsibilities include defining technical requirements and designing PSoC based development kits, system design, technical review for system designs and technical writing. He has 8+ years of industry experience. He earned his Master’s Degree on Master of Science in Research on Information and Communication Technologies (MERIT) from Universitat Politècnica de Catalunya, Barcelona, Spain and B.Tech from Cochin University of Science and Technology, Cochin, India. His interests include embedded systems, high-speed system design, mixed signal system design and statistical signal processing.