High-performance embedded computing -- Dynamic voltage and frequency scaling
Editor's Note: Interest in embedded systems for the Internet of Things often focuses on physical size and power consumption. Yet, the need for tiny systems by no means precludes expectations for greater functionality and higher performance. At the same time, developers need to respond to growing interest in more powerful edge systems able to mind large stables of connected systems while running resource-intensive algorithms for sensor fusion, feedback control, and even machine learning. In this environment and embedded design in general, it's important for developers to understand the nature of embedded systems architectures and methods for extracting their full performance potential. In their book, Embedded Computing for High Performance, the authors offer a detailed look at the hardware and software used to meet growing performance requirements.
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Adapted from Embedded Computing for High Performance, by João Cardoso, José Gabriel Coutinho, Pedro Diniz.
2.6.2 DYNAMIC VOLTAGE AND FREQUENCY SCALING
By João Cardoso, José Gabriel Coutinho, and Pedro Diniz
Dynamic voltage and frequency scaling (DVFS) is a technique that aims at reducing the dynamic power consumption by dynamically adjusting voltage and frequency of a CPU . This technique exploits the fact that CPUs have discrete frequency and voltage settings as previously described. These frequency/voltage settings depend on the CPU and it is common to have ten or less clock frequencies available as operating points. Changing the CPU to a frequency-voltage pair (also known as a CPU frequency/voltage state) is accomplished by sequentially stepping up or down through each adjacent pair. It is not common to allow a processor to make transitions between any two nonadjacent frequency/voltage pairs.
MEASURING POWER AND ENERGY
Power dissipation can be monitored by measuring the current drawn from the power supply to the system or to each device. There are specific boards providing this kind of measurements but this scheme requires access to the power rails for the inclusion of a shunt resistor from the Vcc supplied and the device/system under measurement (note that P = Vcc x Icc). This is typically a problem and only useful in certain conditions or environments. Another possibility is to use pass-through power meters as the ones provided for USB interfaces.
Some computing systems provide built-in current sensors and the possibility to acquire from the software side the power dissipated. Examples of this are the support provided by the ODROID- XU3,a which includes four current/voltage sensors to measure the power dissipation of the ARM Cortex big.LITTLE A15 and A7 cores, GPU and DRAM individually, and the NVIDIA Management Library (NVML)b which allows to report the current power draw in some of their GPU cards.
By measuring the average current and knowing the voltage supply we can derive the average power dissipated and the energy consumed during a specific execution period.
A software power model based on hardware sensing is used in the Running Average Power Limit (RAPL)c driver provided for Intel microprocessors since the Sandy Bridge microarchitecture.d
The measurements are collected via a model-specific microprocessor register. Recent versions of platform-independent libraries such as the performance API (PAPI)e also include support for RAPL and NVML-based power and energy readings in addition to the runtime performance measurements based on hardware counters of the microprocessors. Monitoring power in mobile devices can be done by specific support such as the one provided by PowerTutorf in the context of Android-based mobile platforms. One important aspect of monitoring power dissipation is the power sampling rate (i.e., the maximum rate possible to measure power) which can be too low in some contexts/systems. Finally, other possibilities for measuring power and energy are the use of power/energy models for a certain platform and application and/or the use of simulators with capability to report estimations of the power dissipated.
bNVIDIA Management Library (NVML)—Reference manual, NVIDIA Corporation, March 2014, TRM-06719-001 vR331. https://developer.nvidia.com/nvidia-management-library-nvml.
cIntel Corp. Intel 64 and IA-32 architectures software developer’s manual, vol. 3B: System Programming Guide, Part 2, September 2016.
dIntel Corp. Intel Xeon processor. http://www.intel.com/xeon, 2012.
eWeaver VM, Terpstra D, McCraw H, Johnson M, Kasichayanula K, Ralph J, et al. PAPI 5: measuring power, energy, and the cloud. In: IEEE Int’l symposium on performance analysis of systems and software; April 2013.
fPowerTutor: A power monitor for android-based mobile platforms, http://ziyang.eecs.umich.edu/projects/ powertutor/.
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