Painless MCU implementation of space vector modulation for electric motor systems
Space vector modulation (SVM) has become the most popular voltage modulation technique for use with field-oriented control (FOC) based electric motor systems. The most common SVM techniques in use today involve directly manipulating the voltage states in order to generate the desired voltage vector without requiring a look-up table or trigonometric calculations. A lesser-known technique gives developers the ability to seamlessly transition into the over-modulated mode of operation, in addition to sharing the above benefits. In this article, the underpinnings of SVM will be presented from a graphical perspective along with supporting equations.
Most three-phase electric motors do not give access to their neutral connection. SVM takes advantage of the floating neutral inside of the motor and uses the full DC buss voltage. In Figure 1, three voltage vectors are shown: Va is on the X-axis while Vb is shifted 120 degrees and Vc is shifted 240 degrees.
Figure 1: Voltage space vectors that represent the three winding potentials of a three-phase electric motor. (Source: Texas Instruments)
The DC buss voltage (Vbuss) spans the two horizontal lines that intersect with Vb and Vc. In this case, the three-phase line-line voltage Vbc fully utilizes Vbuss.
Figure 2 illustrates what happens when the voltage vectors are rotated 90 degrees from the X-axis while keeping the neutral at the center of Vbuss. Currently, the buss voltage is not large enough to create voltage vector Va. This is the case when pure three-phase sinusoids are modulated on a carrier wave to create a three-phase PWM. To create three symmetrical sinusoids, all voltage vectors’ magnitudes will have to be reduced. The amount that each voltage vector has to be reduced is described below:
This reduces the peak-to-peak voltage by 15.5 percent.
Figure 2: By keeping the neutral at the center of Vbuss, the magnitude of the voltage vector Vb has to be reduced at certain angles of motor rotation. (Source: Texas Instruments)
The SVM technique takes the three-phase vectors in Figure 2 and shifts them all down so that the magnitude of the phase voltage does not have to be reduced. Taking Figure 2 and shifting its neutral downward, as shown in Figure 3, allows voltage vector Va to have the same magnitude. In the case of Figure 3, the neutral is shifted down from Vbuss/2 by:
Shifting down works fine for Figure 3, but what about the case where Va is pointing straight down instead of up? In that case, we would need to shift all the voltage vectors up by an amount equal to 0.1443 of Vbuss. In other words, the amount of common-mode bias which needs to be added to all of the voltage vectors is dynamic and is a function of the angle of the space vector rotation.
Figure 3: Shifting the neutral downward allows vector Va to keep a larger magnitude. (Source: Texas Instruments)
Figure 4 shows 360 degrees of rotation of a SVM waveform. You can also see the orientation of the voltage vectors and what path the neutral takes.
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Figure 4: A full rotation of the SVM waveform at 30 degree angles. Va is the reference point for the vector plots. (Source: Texas Instruments)