Designing with an embedded soft-core processor -

Designing with an embedded soft-core processor


When designing an embedded solution, the designer will have productlevel requirements that mandate the processing of various inputs toyield predictable outputs.

There will be a number of acceptable options to choose from whenselecting the type of design that will be used for the controller. Thefirst solution is a “Discrete” microprocessor, which seem to be themost commonly used solution. The second solution is a “hard” processorcore, which will be embedded in hardware as dedicated silicon in eitheran FPGA (Field Programmable Gate Array) or an ASIC (ApplicationSpecific Integrated Circuit).

<>Alternatively, an embedded soft-core processor may be a viablesolution where the processor is implemented in the primitives of anFPGA. The decision regarding the type of controller used is typicallybased on a balance between schedule, unit cost, space constraints,product lifetime, toolset, and flexibility needs.

Different options are availableto a designer needing to select a microprocessor. Some options providemore benefits over others; however, not all options are a fit for everyapplication. The key is to know what is needed for the application andthen select the correct option that will suit the application. Threeprocessing options will be briefly discussed here: the “discrete” OTS(Off the shelf) processor, a hard processor core, and finally the softprocessor core.

Discrete Processor
A discrete OTS microprocessor solution is the traditional approach thatdesigners have used. These types of processors are available from amultitude of vendors and have a wide range of features. A discretemicroprocessor is implemented as an ASIC with a specific peripheral setalong with the processor core.

Selecting a discrete processor that meets the application’s cost andfunctional requirements can be a time consuming process. There aretimes, however, where an OTS processor solution will not meet thoserequirements. An example would be an application that requires customlogic or a significant amount of peripheral functionality that is notavailable in a discrete solution.

In this case, the logical place to look is at a processor andperipheral set that can be tailored to the application and includedwith the custom logic that is needed for the application.

Hard Processor Core
A hard processor core has dedicated silicon on the FPGA. This allows itto operate with a core frequency and have a DMIPS rating similar tothat of a discrete microprocessor. A benefit a hard-core provides isthat it exists in an environment where the surrounding peripherals canbe customized for the application.

Unfortunately, it does not provide the ability to adjust the corefor the application, nor does it allow for the flexibility of adding aprocessor to an existing design or an additional processor for moreprocessing capabilities. In addition, only specific FPGAs will have theoption of having a hard-core; therefore, the choice of vendors andFPGAs are limited.

Soft Processor Core
A soft-core processor solution is one that is implemented entirely inthe logic primitives of an FPGA. Because of this implementation, theprocessor will not operate at the speeds or have the performance of ahard-core or a discrete solution. In many embedded applications, thehigh performance achieved by the previous two processing options is notrequired, and performance can be traded for expanded functionality andflexibility.

Soft-core processors may be appropriate for a simple system, wherethe only functionalities are the manipulation of GPIO (General PurposeInput/Output). Moreover, they may also fit a complex system, where anoperating system is incorporated and interfaces include Ethernet, PCI(Peripheral Component Interconnect), and DDR SDRAM (Double Data RateSynchronous Dynamic Random Access Memory), and any other custom IP.

Why Design with a Soft-CoreProcessor?
There are many reasons for selecting a soft-core processor over otherprocessing options. The first reason is that this type of processorprovides a substantial amount of flexibility through the configurablenature of the FPGA.

In an ideal productdevelopment process, all requirements are gathered and solidifiedbefore the design portion of a project ever begins. As much asengineers wish this were the case, this seldom happens. Requirementsoften change throughout the course of the design and, in the majorityof cases, requirements are added. In addition, requirements are stillbeing defined in a research and development situation.

Using a soft-core processor alleviates many of the issuesencountered due to changing requirements, which can be detrimental to aproject if using a discrete microprocessor solution. A soft-coreprocessor solution will prevent the design team from being confined toa specific set of peripherals that may no longer fit the application asrequirements change or new features are desired.

A soft-core processor allows a designer to add or subtractperipherals from the SoPC with ease. In many toolsets, adding andconfiguring a peripheral is typically done in a few short steps. Notonly is the addition of a peripheral easy to do, but there are a widevariety of peripherals available from vendors.

The list of peripherals available includes memory controllers,timers, counters, GPIO blocks, UARTs (Universal Asynchronous ReceiverTransmitter), and interconnects such as PCI, RapidIO, andHyperTransport. The list is constantly growing, giving a designer manyoptions for constructing an SoPC. The peripherals and soft-coreprocessor are designed in HDL (Hardware Description Language), enablingfurther customization of the system to be performed.

Adding Peripherals
The method in which the peripherals are connected to the processorwithin the SoPC is flexible. The SoPC system is comprised ofmemory-mapped devices with read and write interfaces.

Each peripheral within a system has a similar read/write interface,creating a common interface to the processor and to other peripherals.The logic for the address decoding, arbitration, data bus sizing, andthe connection of control and bus signals is encompassed within a setbus structure.

The benefit of a set bus structure is that it is handled and createdby the toolset, leaving the designer to concentrate on creating thesystem peripherals. Situations will arise where a required OTSperipheral is not available. In this case, a custom peripheral can becreated. Given that each peripheral has a similar read/write interface,a peripheral can be created without knowledge of what is or will be inthe system. Having the ability to attach custom peripherals enables adesigner to give a soft-core processor whatever functionality isrequired.

Using an SoPC enables a designer to construct a system that fitsexactly what the requirements call for, avoiding cost and time spentconfiguring unnecessary features. Sometimes the microprocessor that hasall of the features needed to meet the design requirements alsocontains more, unnecessary features.

For example, an application may call for a 32-bit processor, 256MBof SDRAM operating at 133MHz, and 2 10/100 Ethernet MACs (Media AccessControl). In this scenario, the only discrete processor that is foundalso contains a PCI interface. Not only does this additional interfaceadd to the cost of the part, but the interface also has to be takeninto account when designing it into the product.

A soft-core processor in an SoPC eliminates the burden of doing asignificant search for a discrete processor and having to handleundesirable, added functionality. The designer has the flexibility tocreate a custom system that contains only the functionality needed.Further, the system can be modified as needed to meet any future needs.

Customizable Processor Core
A soft-core processor also offers the flexibility of tailoring the coreitself for the application. There are a few different levels of howthis can be accomplished, depending on the vendor. On one level, thingssuch as cache size can be easily adjusted.

Most toolsets offer the option to configure different cache sizes tosuit what the application requires. A vendor may also offer differentversions of the processor that have varying levels of performance. Inthis case, a higher performance version of the processor would havemore pipeline stages, increasing throughput. This offers moreflexibility to the user.

It is important to note that along with a performance increase therewill also be an increase in the amount of logic elements that theprocessor will consume or the amount of memory that the processor willconsume, leaving fewer resources for peripherals and custom logic.

On a higher level of complexity, a designer can take the source codefor the processor core and modify it to meet the needs of theapplication. Being able to modify the source code to the actualprocessor core offers the greatest of flexibility that one can obtain.Not all vendors will offer source code for their soft-core processorsolution; sometimes the core is encrypted.

Board-level configurability
Using an SoPC solution also offers flexibility external to the FPGA. Adiscrete microprocessor solution has a fixed pinout, sometimes makingrouting difficult. Since an SoPC exists in an FPGA, the pinout isflexible. This gives the board designer almost complete freedom withcomponent placement, provided the FPGA still meets the timingconstraints with the final pin placement.

Another benefit is that there are more GPIO available in an SoPCsolution compared to a discrete microprocessor. The FPGA can be scaledup in size if necessary to accommodate any additional IO that isneeded, whereas an ASIC solution restricts the IO use to what is on theIC; no expansion is available.

An SoPC solution also provides more options with prototypingpossible solutions without a significant change to the hardware. Thisbenefit in flexibility is mostly realizable when using hardwareprovided in the form of a development kit from the vendor.

Faster design cycles
Using a soft-core processing solution can reduce schedule in both thedesign and verification phases of a project. Constructing a system canbe done in a short amount of time, since there are toolsets provided byvendors just for this purpose. Along with the OTS peripheralsavailable, many of them come packaged with software drivers, which willhelp shorten the software development time.

Software can be tested earlier in the development cycle; no longerdoes a software engineer have to wait until the board design iscomplete, prototyped, and debugged. An SoPC enables verification of thesoftware while verifying the hardware.

One option is hardware/software co-simulation. In the design phaseof a project, the software and hardware are being developed inparallel. At some point, the two paths can merge and both the hardwareand software can be simulated together to test functionality.

In an FPGA design, it is always part of the process to simulate thedesign before it is put in actual hardware. However, designing with anSoPC allows the project team to be able to verify the software runningon the embedded processor along with the attached peripherals. Thesimulations are not restricted to only testing the embedded system; theentire FPGA can be simulated with software executing.

When hardware and software paths are ready to merge and systemsimulations are to be executed, the toolsets from the FPGA vendor dothe majority of work preparing the design for simulation.

The tool will create the simulation project file, create a top leveltest bench, instantiate the processor and peripherals in HDL, andcreate generic, basic memory models if specified. The top level testbench that is generated can be expanded and modified enabling thedesigner to instantiate other modules, test other functionality, createstimulus, and monitor signals within the complete FPGA.

Along with generating necessary files to simulate the hardware, thedevelopment environment compiles C/C++ code into machine code. Themachine code is included in a data file that is used to initialize theprogram memory. After these files are created, the complete SoPC can besimulated, with software running, testing for desired functionality.

FPGA vendors offer development boards as part of the development kitfor a soft-core processing solution. These development boards can beused in addition to simulating the design. Utilizing the developmentboards in an SoPC design process enables the software and FPGA imagesto be tested on hardware before custom form factor boards areprototyped.

Traditional microprocessor vendors also have boards available forsoftware development use. However, the soft-core processor’sdevelopment board allows the hardware designer to test out portions ofthe SoPC design on actual hardware, not just depending on simulationsfor confidence.

Testing the FPGA design with software on actual hardware earlier inthe design process gives the design team more confidence and reducesthe time spent debugging form factor hardware when it arrives. Asflexible as the development platform is, the design team will not beable to completely test a design due to limitations with the hardwareexternal to the FPGA.

Embedded logic analyzer. FPGAvendors offer the ability to embed logic analyzer functionality withinthe FPGA to monitor signals within the FPGA design. Having the abilityto look at nodes deep within the hierarchy of an FPGA design providesgreat benefit when debugging and makes debugging easier and quicker.Beyond debugging purposes, the use of an embedded logic analyzer with asoft-core processor enables the design team to gain a deeper level ofunderstanding and familiarity with the design, making futuremodifications easier and quicker task.

Migrating to a Soft-Core ProcessorSystem
A situation may exist where an FPGA was designed without a soft-coreprocessor, and it was decided later that having a soft-core processorwould provide for a better solution for the application. Anothersituation may call for quick additions to the FPGA.

Adding a soft-core processor takes care of both of these situationsin the timeframe required, as long as there are logic resourcesavailable in the FPGA. Designing the solution from the ground up inhardware is not feasible within a short timeframe. Having aconfigurable device with a processor implemented in logic allows forboth of these situations to be addressed easily.

Multiple Processors. Morecomplex embedded systems could benefit from the use of multipleprocessors to decrease the execution time by executing tasks inparallel. Soft-core processors and their accompanying toolsets can makethe task of implementing multiple processor cores that interface with acommon set of peripherals much more feasible and appealing todesigners.

Also, there are not any additional BOM costs for adding a soft-coreprocessor in an FPGA as long as there is enough space in the FPGA forthe implementation. The only restriction on how many processors can bein an SoPC is the logic available in the FPGA. Therefore, when using anSoPC in a design where more parallel processing is required, addinganother soft-core processor is a viable solution that does not impacthardware significantly.

For the most part, the soft-core design process is not too differentfrom any other embedded development. Perhaps the only major differencesare additional roles that may not be found in other developmentapproaches and the stress on continuous communication between thedifferent designer roles to maximize the use of additional featuresthat may be available.

DonArbinger is hardware design engineer and Jeremy Erdmann is embeddedsoftware design engineer at PlexusTechnology Group.

This article is excerpted from apaper of the same name presented at the Embedded Systems ConferenceSilicon Valley 2006. Used with permission of the Embedded SystemsConference. For more information, please visit

1. Avalon Bus SpecificationReference Manual, Altera, Revision 2.3
2. NIOSII Processor ReferenceHandbook, Altera, Revision 1.0, May 2004

Additional CMP Media/Embedded.comresources:
1. Back to the Basics: Allabout FPGAs
2. Tackle team-based FPGAdesign
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4. Using softcore-basedFPGAs to balance hardware/software needs in a multicore design
5. OptimizingDSP functions in advanced FPGA architectures
6. Maximizing DSP, embedded CPU performance in FPGA designs
7.  Simplifyyour multiprocessor-based network design with multicore FPGAs

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