 Determining the packaging limits range of linear regulators - Embedded.com

# Determining the packaging limits range of linear regulators

Engineers like low drop out (LDO) linear regulators for their simplicity, ease of use, low price and low-noise characteristics. A typical linear regulator requires only a couple of external capacitors and resistors to fully implement a DC/DC converter.

Typically, engineers select linear regulators based on a few specifications listed on the front of the datasheet that outline the operating envelope of the regulator such as input voltage range, output voltage, output current and drop out voltage. Then engineers typically search for the smallest package size so that the overall solution size is minimized.

Herein lies the problem. The thermal characteristics of the packaging can impose limits on the operating envelope listed in the datasheet.

For example, the datasheet for the TPS73401 linear regulator states the input voltage can range from 2.7V to 6.5V, the output voltage can be set to any value between 1.2V and 6.3V, and the device can provide up to 250mA of output current and is packaged in a 5-pin TSOT23 (or 6-pin SON) package. Based on these specifications, the operating envelope of the linear regulator could be graphed as shown in Figure 1 below .  Figure 1. Datasheet implied operating area of a linear regulator

The X-axis in Figure 1 above is the input voltage minus the output voltage, or more simply the voltage drop across the linear regulator. The lower end of the operating window's X-axis is limited by the drop out voltage of the linear regulator, while the upper end is limited by both the maximum input voltage and minimum output voltage the regulator can support.

The Y-axis is the maximum load current at which the regulator is specified. However, this ideal operating envelope does not take into account the power dissipation and, thus, the junction temperature rise of the device at any of these operating points. A thermal analysis must be performed to fully understand the actual operating envelope.

The first step of the thermal analysis is to determine the linear regulator's power dissipation. A generic linear regulator with its pertinent voltages and currents is shown in Figure 2 below .  Figure 2. Generic linear regulator

The power dissipated by the linear regulator is a fairly straight forward calculation. There is the power dissipated by the voltage drop across the regulator, multiplied by the load current passing through the regulator.

There is an additional power loss due to the quiescent current needed to operate the internal logic and control functions. This power loss is simply the quiescent current, or ground-pin current, multiplied by the input voltage. The equation for the linear regulator's total power dissipation is shown in Equation 1 below . Many older, standard linear regulators (non-low drop out), were implemented using bipolar transistors. Bipolar transistors require current always to be flowing into the base in order to bias the transistor on. This base current increases the quiescent current, or ground-pin current of the linear regulator. The ground-pin current of these older devices can be in the tens of milliamps range, which noticeably adds to the power dissipation of the linear regulator.

Most new LDO linear regulators are implemented using MOSFETs instead of bipolar transistors. MOSFETs do not require constant gate current, so the quiescent current typically is very small. In this case, the last term of Equation 1 above that includes the ground-pin current becomes negligible compared to the first term and can be ignored. The next step of the analysis is to determine the junction temperature of the linear regulator. The easiest method to do this is to multiply the power dissipation by the thermal impedance of the package being used, which gives the temperature rise. This can be added to the ambient temperature of the air surrounding the board to calculate the temperature junction.

Equation 2 below is the general formula to find the junction temperature, (TJ) of a device at some ambient temperature (TA ). Most datasheets provide the thermal impedance from the junction to ambient air as a numerical constant ΘJA or Theta-JA . Theta-JA is measured by every semiconductor manufacturer using an industry standard board and testing methods. The standard test board typically is not thermally representative of an end-users board. Therefore the possibility exists that the calculated temperature rise using Theta-JA versus the actual temperature rise of the device in a real system will have large variations.

The Theta-JA number is best suited for making relative thermal performance comparisons between different device packages or device manufacturers or as a good first estimate of the junction temperature rise.

Equations 1″2 earlier can be combined to create one equation that uses all of the variables. If the ground-pin current is neglected, Equations 1″2 combine to make Equation 3 below . This single equation links the linear regulator's operating points to the package's thermal characteristics and the junction temperature. Equation 3 above can be used with datasheet parameters to determine the thermally safe operating area of a linear regulator for different package types and temperature rises. For the example using TPS73401, the datasheet states the following parameters:

ZVIN : 2.7V ” 6.5V
VOUT : 1.2V ” 6.3V adjustable
IOUT : 250mA
TJ : 125C (recommended maximum operating junction temperature)ΘJA : 200 C/W (TSOT23-5 package, high K board)
ΘJA : 65 C/W (SON-6 package, high K board)

It comes in two different package types, the 5-pin TSOT23 and the 6-pin SON, each with different Theta-JA s. These values can be used along with Equation 3 to create a graph of the thermal-safe operating area for an ambient temperature of 85C as shown in Figure 3 below .  Figure 3. Thermal-safe operating area for 85 degree C ambient air

This new operating envelope graph shares the same lower and upper limits as the operating envelope implied by the datasheet (Figure 2). However, the upper right-hand corner of the envelope is now limited by the thermal performance of the package type.

Operating conditions with high output current or a high-voltage drop across the linear regulator may fall outside of the thermal-safe operating area, which means the junction temperatures will exceed the maximum safe operating temperature.

Continuing with our example, the graph can be used to pick an appropriate package type for a 5.0V to 3.3V DC/DC conversion with the linear regulator. The operating point on the X-axis is then 5.0V minus 3.3V, which equals 1.7V.

Looking at Figure 3 above , both packages have safe operating areas with VIN ” VOUT = 1.7V. However, we can also see that if the load current of the TSOT23 package goes higher than 115mA (point A on the graph ), the device is no longer in the thermal-safe area for the package and junction temperatures will exceed the recommended operating maximum.

The SON-6 package (point B on the graph ) remains in the safe operating range, so this package can supply the full-load current while maintaining safe junction temperatures. If the design absolutely requires using the TSOT23 package and full output current, the designer must lower the voltage drop across the regulator to less than 0.8V, or reduce the ambient temperatures the system is expected to see.

When selecting a linear regulator, the designer must take into account the package's thermal performance, in addition to the obvious selection criteria such as input voltage, output voltage, and output current. When a linear regulator is available in several different package styles, the smallest package may be desirable from a board space standpoint, but it may also limit the regulator's operating range.

Scot Lester is the manager of the Linear Power and Battery Charging Application groups in the High-Performance Analog Group at Texas Instruments. He has over 19 years of hands-on board level design experience and specializes in low-power DC/DC converters for battery operated and portable applications. Scot is a member of TI's Group Technical Staff and holds a BSEE from Montana State University, and an MBA from George Mason University, Virginia. Scot can be reached at ti_scotlester@list.ti.com .

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