During my summer vacation in 1973, the Yom Kippur war broke out in the Middle East. I was at the end of 3rd year at the Technion, Israel Institute of Technology, and being a temporary resident meant that I was not called up to the army. Almost everyone I knew was – students and lecturers alike were all taken out of circulation. The next academic term was put on hold, pending everyone’s return. The military call-up also meant a depletion of the workforce as a whole, so I got a job in the documentation department of a subsidiary of Control Data located in Haifa. Control Data was renowned for their supercomputers, but we were working on a minicomputer.
All drawings were sketched and then transferred to the drafting department to hand drawn on vellum (a version of tracing paper). Stencils were used for the electronic symbols. Then a PCB layout specialist would lay out the board using dot and tape on a transparent mylar base. One of my jobs was to check that the resulting PCB matched the schematic exactly. Of course we didn’t work directly with originals. They were copied on a blueprint copying machine, a machine that involved ultraviolet light, lots of rollers and treated paper that needed ammonia to develop. Aah, the memories of that smell! It was pretty harsh on the actual layout because repeated copies would result in the fatigue of the physical design. Late in the development cycle there would be problems with tape lifting and resulting in shorts and open circuits. But I digress.
With a copy of both the schematic and the PCB I would check each and every line to track. It proved quite educational, as only the real world can. It remained a habit with me ever since then. Even when I designed and laid out my own boards I still checked them scrupulously. A one-man business making small volume production runs cannot afford too many mistakes.
Today, despite the layout tools check of netlists, a CAD design can include errors- normally as a result of human failing. But this is not the only thing I am checking for. I check the placement of the decoupling capacitors, clearances, heat-sinking, earth planes and more. I find the most important part is that it gives me the opportunity for sober second thought – is this the best way realise the design? Why aren’t these two nets connected? Should we be using two smaller boards rather than one big one? Potential cross coupling of signals and on and on. Can I reduce the number of gates by changing the layout, or simplify the layout by adding some gates or shuffling the I/O pins on the micro? Some of these were taken into consideration at the start or the process, but when it has made it onto paper (or a screen) you can evaluate the wisdom of your choices.
Some engineers simply plug the design into an autorouter and don’t even check for a trace that meanders around the board. Especially with multilayer boards when you get to the physical product, it is impossible check visually on the inner layers. In addition correcting those errors with jumpers is much more difficult. I maintain that a full check gives great benefit that increases the probability of getting it “right the first time”. The time lost in checking is recouped manifold when you don’t have to spend hours debugging.
Who’s with me?