Here's a clever averaging scheme, used for noise reduction, that blendsboth the quick response of a moving averager and the noise reductioncontrol of an exponential averager. The structure of this dual-modeaverager is depicted in Figure13-81(a) below . (Thanks to DSPguru Fred Harris for recommending this dual-mode averager. )
|Figure13-81 Dual-mode averaging: (a) standard form, (b) alternate form|
The averager operates as follows: the switch remains open for Kinput samples after which the y(n) output is equal to the K-pointaverage of the x(n) input.
Just prior to the arrival of the K+1 input sample the switch closesconverting the moving average filter to an exponential averager, withits (1 – 1/K) feedback, giving us control over the filter's noise reduction properties.
In implementations where the adder's output word-width must beminimized, the second 1/K multiplier can be moved ahead of the adder toreduce the amplitude of the adder's output samples as shown in Figure 13-81(b) .
Here's another neat idea. If we can accept K being an integer powerof two, the multiply by 1/K computations can be implemented witharithmetic, or hard-wired, binary right shifts giving us amultiplierless noise reduction filter.
Usedwith the permission of the publisher, Prentice Hall, this on-goingseries of articles is based on copyrighted material from “UnderstandingDigital Signal Processing, Second Edition” by Richard G. Lyons. Thebook can be purchased on line.
Richard Lyons is a consultingsystems engineer and lecturer with Besser Associates. As alecturer with Besser and an instructor for the University of CaliforniaSanta Cruz Extension, Lyons has delivered digitasl signal processingseminars and training course at technical conferences as well atcompanies such as Motorola, Freescale, Lockheed Martin, TexasInstruments, Conexant, Northrop Grumman, Lucent, Nokia, Qualcomm,Honeywell, National Semiconductor, General Dynamics and Infinion.