ART2 is a dynamically reconfigurable logic technology developed by Akya. ART2 lets designers rapidly produce future-proofed chips with a highly efficient use—and reuse—of silicon area. It simplifies the design and implementation of reconfigurable chips by separating dataflow circuitry from control logic. A large library of IP building blocks enables designers to optimize the design and keep the silicon area as small as possible, resulting in smaller, lower cost chips. ART2 has the potential to pave the way for flexible, low-risk IC designs, allowing OEMs to quickly adapt their designs to changing market needs.
ART2 reduces the risk involved in producing custom semiconductors. Using the technology, ICs can be adapted to changes in standards or requirements without the need to design new silicon. By software reconfiguration of the ART2 portion of each IC, product lifecycles can be extended and bugs fixed after tape-out and even in the field. By using the same flexible chip across several product ranges, companies can also achieve significant economies of scale through higher-volume manufacturing.
ART2 consists of a library of reconfigurable IP building blocks. This allows a greater degree of flexibility in how companies design reconfigurable functions, and enables a more efficient use of silicon area.
The ART2 development kit features two high-level languages, one for data flow and one for control, making the design of ART2 circuitry as simple as possible. Akya provides comprehensive training in the ART2 architecture compiler (artac). As artac is simple to use, existing staff can be quickly trained in the new languages.
For more information, go to www.akya.co.uk.