EEMBC Unveils Plans for Multicore Benchmarks - Embedded.com

EEMBC Unveils Plans for Multicore Benchmarks

El Dorado Hills, Ca. – The Embedded Microprocessor Benchmark Consortiumtoday announced plans to soon roll out new benchmarks that will addressmultiprocessing systems, multicore processors, and multithreadedprocessors.

The EEMBCeffort, which has been underway since mid-2006, is being led byJohn Goodacre of ARM, who serves as chair of EEMBC's multiprocessingworkgroup.

With the proliferation of multicore processor implementations,” saidShay Gal-On, director of software engineering at EEMBC, “the need isgrowing for performance benchmarks that can give an accurate indicationof the value of transitioning from a single core to a multicore system,in addition to determining the impact of system-level bottlenecks, suchas those encountered when moving data on and off a multicore chip.

He said the soon to be released multicore benchmark suites willprovide a standardized way to evaluate the benefits of concurrencywhile providing the scalability needed to support any number ofmultiple cores.

The multicore benchmark software will initially support symmetricalmulticore processors with shared memory and will utilize a thread-basedAPIto establish a common programming model.

Targeted will be three forms of concurrency: task decomposition,multiple data stream processing, and the processing of multipleworkloads. Task decomposition allows multiple threads to cooperate onachieving a unified goal and demonstrates a processor's support forfine grain parallelism.

Processing of multiple data streams uses common code running overmultiple threads and demonstrates how well a solution can scale overscalable data inputs. Finally, multiple workload processing shows thescalability of a solution for general-purpose processing and activatesconcurrency over both code and data.

To implement this strategy on the benchmark level, said Gal-On, atest harness is being developed that will communicate with thebenchmark through an abstraction layer that is analogous to analgorithm wrapper. This test harness will provide a flexible interfaceto allow a wide variety of thread-enabledworkloads to be tested.

In addition to using some of the existing EEMBC benchmarks in itsmulticore-enabled benchmark suites, EEMBC has begun work onmulticore-capable VOIP and H.264 benchmarks.

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