Dropping Vdd to Cut Current

May 12, 2014

Jack Ganssle-May 12, 2014

When trying to maximize the amount of energy one can get from a battery powering an MCU it’s important to remember, as I wrote last week, that we’re interested in current, not power, since battery capacity is measured in mAh. The equation for power has a hugely-seductive V squared term, but when we’re (correctly) thinking about current, voltage’s effects are linear.

So, does it make sense to exploit current’s linear relationship with voltage?

Consider the following graph for one of TI’s nifty MSP430 MCUs:

The curves above show a substantial reduction in current as the Vdd decreases. Even at 1 MHz, where the graph isn’t very dramatic-looking, there’s about a 2X improvement by scaling back the MCU’s supply voltage. So this sure looks like a great place to cut coulombs.

It’s tempting to put in a low-dropout regulator to reduce Vdd to 2.0, but I can’t find any linear devices whose idle current during the MCU’s long sleep states won’t deplete the battery. Smarter parts can work, like TI’s $0.80 TPS 62736 buck/boost converter that needs only 400 nA for Iq. It does require an inductor, but those are only about 7 cents in quantity. Touchstone’s TS3310 has even better specs, but that company sold all of its assets to Silicon Labs recently; hopefully the latter company will continue to produce the product.

But long-lived systems are almost always asleep. A device that has to run for a decade off a coin cell will be snoozing well over 99% of the time. The graph above is active current; cut that by half, and factor in the 1% or less awake time, and it’s clear that there’s really no benefit to scaling Vdd.
What about cutting Vdd during the 99% of the time when the processor is sleeping?

Most MCUs offer a number of sleep modes that each have differing energy needs. Some show a very small difference in worst-case consumptions; it’s common to find in a deep sleep only a 20% variation between 3 and 2 volts. 20% may be enough to justify an extra dollar’s worth of buck/boost parts as that could add a couple of years to the operating life of a very-low-power system. But remember that a ten-year life means the system’s average draw from a CR2032 can’t exceed 2.5 uA. The TPS 62736 will eat 400 nA of that budget.

One vendor shows curves for “typical” sleep needs, and there’s about a 2X difference between 3 and 2 volts, which sounds promising. But under 3V the curve is labeled “limited accuracy.” I wrote about how little a “typical” spec means last July. Combine the meaninglessness of “typical” numbers with “limited accuracy” and I, for one, have no idea how to interpret the data. One wonders if the datasheet was created by marketing folks rather than engineers. “Take it from us, in some modes, it’s possible, based on a statistically meaningless set of observations, that the part might, if coupled to the wings of angels, work in your application.”

Unfortunately, most datasheets don’t spec out the difference in sleep current as a function of voltage, so it’s impossible to know what benefits, if any, accrue from voltage scaling.

As always, read the datasheets carefully and do a full analysis of your design goals.

Jack G. Ganssle is a lecturer and consultant on embedded development issues. He conducts seminars on embedded systems and helps companies with their embedded challenges, and works as an expert witness on embedded issues. Contact him at His website is

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