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Making MCU software requirements creation easier

Bernard Cole, EETimes

March 04, 2015

Bernard Cole, EETimesMarch 04, 2015

At Embedded World last week, embedded tool startup Argosim introduced its STIMULUS verification tool for modeling and simulation of a design's software requirements before system design begins.

The company chose the perfect venue for the announcement. As almost any experienced software developer will tell you in a typical embedded systems project most design bugs (40 to 60% by some estimates) are caused by faulty requirements, which lead to additional testing and re-debugging. In an interview with EE Times, Fabien Gaucher, CEO of Argosim said that with present methodologies, avoiding this situation is almost impossible because the present design environment places conflicting demands on the embedded systems developer.

To deal with this, STIMULUS makes use of a new proprietary high-level modeling language that formalizes natural language requirements in a way that allows system integrators of real-time safety-critical systems to deliver correct, unambiguous requirements that comply with IEEE 830 standard "Recommended Practice for Software Requirements Specifications."

"With 32 bit processors becoming the norm, much larger code sizes and their associated complexity are increasingly common," Gaucher said. “And as embedded designs work their way into almost every corner of our lives, industries are being much more particular about defining and enforcing very strict requirements as they relate to security and safety." To make things worse, the time frame to develop a completed product that meets design requirements — internal or external — is getting shorter, and while companies are under constant pressure to reduce costs.

As a technical editor, in the past I have put in hard time working on requirements documentation, so I know that getting it right in such an environment is a laborious, time consuming, and sometimes frustrating process. Even though the aim is to write such documents in natural language that is clearly understandable, the manual review process introduces ambiguities and errors that often are not caught until validation testing.

Currently available tools to make this process less error prone fall far short of what is necessary. IBM Rational's DOORS, for example, mainly focuses on requirement management and traceability, rather than validation. And specification and simulation tools like UML/SysML or Mathworks Simulink aim at describing system design and architecture rather than high-level requirements. Argosim’s STIMULUS is designed both to reduce the error rate introduced by the requirements process and to strip out the amount of laborious rework that must be done when requirements are found to be faulty after coding and testing. It is designed to do two things only and do them well: generate requirements in clear natural language without ambiguities (see image below), and then generate and analyze execution traces that satisfy those requirements.

Stimulus uses formalized natural language for state 

machines and block diagrams.
Stimulus uses formalized natural language for state machines and block diagrams.

The aim, said Gaucher, is to create an environment where systems architects can visualize "what" systems will do so they can discover incorrect, ambiguous, missing or incomplete requirements before the design phase starts defining the "how."

With STIMULUS, once the system has been developed, actual compiled code replaces requirements models. It is also possible to regenerate and run numerous test vectors automatically to optimize functional coverage (shown in screenshot below). Additionally, the new tool can export generated test vectors and rerun them in your favorite test/simulation environment. STIMULUS also retains existing traceability links that may have been defined by third-party requirement management tools so you can import external legacy code.

STIMULUS generates test vectors and detects 

requirement violations automatically.
STIMULUS generates test vectors and detects requirement violations automatically.

While the ability to formalize requirements in a natural language is extremely important, the ability to simulate “what systems shall do” has an additional bonus: it makes requirements validation possible even while writing specifications. "This limits specification errors even further and ultimately reduces costs in the design phase," said Gaucher.

Once the system has been developed, actual compiled code replaces requirements models. It is also possible to regenerate and run numerous test vectors automatically to optimize functional coverage. It is also possible to export generated test vectors and rerun them in your favorite SIL environment. STIMULUS retains existing traceability links defined by third-party requirement management tools so you can import external legacy code from C / Simulink.

"Using our tool, system architects can generate and observe many execution traces that verify requirements, define generic test scenarios and debug requirements against realistic inputs, and generate numerous test vectors for software-in-the-loop validation," Gaucher said. "Then, by supplying these verified requirements to their subcontractors, the system integrators significantly reduce the amount of rework, schedule bloat, and cost of a typical safety-critical system."

From the point of view of an editor who has been through the requirements documentation process more than once, what the company has come up with sounds like the perfect software requirements tool. What are thoughts and experiences do you have? Share them in the comments section below.

Bernard Cole, MCU and PCB Designline editor,EE Times Circle me on Google+ is an embedded microsystems technology analyst who writes about hardware/software design and use across the range of consumer, industrial, automotive, networking and Internet of Things applications. He can be contacted via LinkedIn, by email at bccole@techrite-associates.com or at 928-525-9087.

This article has also been published on the EETimes MCU DesignLine

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