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Sub-threshold voltage, low power ARM MCUs are here

January 19, 2015

Bernard Cole-January 19, 2015

A sub-threshold voltage CMOS process technology that Ambiq Micro has claimed [1] [2] can lower power consumption drastically on 32-bit MCUs without impacting performance is now a reality in a new family of ARM -based processors from the company.

According to Mike Salas, vice president of marketing at Ambiq, the company's new Apollo family of four 32-bit ARM Cortex-M4F microcontrollers (Figure 1) have energy consumption that is typically five to ten times lower than that of MCUs of comparable performance. This results in far longer battery life in wearable electronics and other battery-powered applications. 

Figure 1. Ambiq's Apollo family of ARM Cortex-M4F MCUs incorporate subthreshold voltage technology to allow operation five to ten times lower than traditional microcontrollers of comparable performance.

The dramatic reduction in energy consumption is achieved using Ambiq’s patented Subthreshold Power Optimized Technology (SPOT) platform, which allows optimization of the active and sleep mode power states of the MF4 MCUs. The MCUs consume 30µA/MHz when executing instructions from flash and feature average sleep mode currents as low as 100nA.

The new ARM CPUs are fabricated with proprietary optimizations of standard CMOS processes that allow transistor operation at subthreshold voltages (less than 0.5V), rather than using transistors that are turned all the way “on” at 1.8V. Instead, the leakage current of “off” transistors is used to compute in both digital and analog domains and do so without the problems of noise susceptibility, temperature sensitivity, and process drift previously associated with subthreshold voltage switching.

"This extremely low energy consumption does not compromise performance, however," said Salas. He said the company has performed a variety of tests using the industry standard EEMBC CoreMark benchmarking program, in which their new Cortex-M4F CPUs outpaced other competing low power ARM derivatives.

Salas said that when CoreMark was used to compare its Cortex-M4 implementation to the one used in STMicro's STM32F401, Ambiq determined its Apollo implementation has ten times better power/performance characteristics in the active mode (35 microAmperes/MHz vs 355 uA/MHz) and 28X better in the sleep mode (100nanoAmperes vs 2800 nA). Compared to a similar implementation from Atmel, the SAM4L, the CoreMark algorithm indicated a three- to five-fold improvement in the active mode and a 15X improvement in the sleep mode.

According to Salas, Ambiq’s implementation of the floating point optimized Cortex-M4F also compared well to a number of Cortex-M0+ implementations. For example, benchmarked against the Silicon Labs EFM32 Zero showed a 3.3 X improvement in the active mode (35 vs, 115 uA/MHz) and a 9X improvement in the sleep mode (100 vs 900 NA).

Ambiq's SPOT platform is one that competitors will have a hard time matching as it is a set of techniques the company as come up with for CMOS transistor power and performance optimization. It is the result, said Salas, of more than five years of research and modeling (Figure 2) on all aspects of transistor operation in the sub-micron (nanometer) realm of current CMOS-based processor designs. The company's efforts build on work originally started at the University of Michigan [3].

Figure 2. Transistors have not been well modeled for low power subthreshold operation in nanometer CMOS designs

With this detailed understanding as the starting point, Ambiq's engineers have been able to re-characterize selected transistors from mainstream processes for operation in the sub-threshold regime, starting the development process standard low-power transistors and using sub-threshold transistors only when necessary to keep costs down. Once the transistors were better understood, cells and circuits were modified to operate with subthreshold voltages. Before doing this, the cell libraries needed were carefully surveyed and pared down. Once the critical cells were identified, they were then redesigned as subthreshold circuits.

"There were two goals behind these circuit design efforts," said Salas. "One was to manage the extreme sensitivity to changes in threshold voltage and operating conditions, and the other was to optimize operation for minimal energy consumption."

This need to use different transistor modeling and implementation techniques even applies to the type of transistors and the regimes within which they operate, he said. In some cases, normal super-threshold transistors, such as for analog, can make sense because they are simpler to characterize and using them where they don’t affect energy consumption can be beneficial.

If the company's claims prove out in practical designs, embedded, wearable and Internet of Things applications that now currently use less powerful but more energy efficient 8- and 16-bit MCUs may now move to 32-bit based designs. This would have its most immediate impact in such consumer applications as wearable IoT devices that are now limited to days or weeks of operation on a coin cell battery, when 32-bit CPUs are used.

Alternatively, if such designs do not need an improvement in battery lifetime, engineers can take advantage of the expanded power budget to add new features and functions that were not previously possible, or opt for smaller batteries.

Capable of operation at up to 24MHz, the new family of Apollo CPUs will be available with up to 512kB of flash and 64kB of RAM to accommodate radio and sensor overhead in addition to application code. Communication with sensors, radios, other peripherals and an optional host processor is implemented via I2C/SPI ports and a UART.

On-chip resources include a 10 bit, 13-channel, 1MS/s ADC and a temperature sensor with ±2ºC accuracy. Two compact packaging options are available – a 64-pin, 4.5 x 4.5mm BGA package with 50 GPIO and a further size-optimized 2.4 x 2.77mm, 42-pin CSP with 27 GPIO. They are now being sampled with selected customers and will be available in volume production within the next three months.

Further reading:
[1] ARM readies near threshold voltage Cortex M0 for IoT (2013)

[2] Ultra-low power microcontrollers for compact wireless devices (2011), by Scott Hansnn, Ambiq Micro. 

[3] Energy-efficient subthreshold processor design (2009), by Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Todd Austin, Dennis Sylvester, and David Blaauw, University of Michigan.

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