Advanced AI chips to build on emerging memory technologies
Imec, the Belgium-based nanoelectronics and digital technologies research center, is leading a European Union program to develop low-power edge artificial intelligence (AI) chips based on several emerging memory technologies.
The three-year program, called Tempo (Technology & hardware for nEuromorphic coMPuting), is a cross-border collaboration between 19 research and industrial partners, including CEA-Leti of France and the Fraunhofer Group of Germany. The joint effort aims to develop process technology and hardware platforms leveraging emerging memory technologies for neuromorphic computing. The goal is to develop a new way to support applications in mobile devices that need complex machine-learning algorithms.
Today, applications of this sort typically rely on shipping data to cloud-based server racks and then back. Complying with European data privacy regulations is difficult with a cloud-based approach however. Given those restrictions, the alternative is to perform AI on the edge — within battery-powered mobile devices such as cars and smartphones. The technology to do so doesn't exist, so Europe must create it.
The topic is relevant especially in Europe, but it's a concern across the industry. Edge AI and machine-learning algorithms are becoming increasingly necessary in day-to-day products and applications such as smart home assistants with natural-language processing, security systems that employ facial recognition, or autonomous vehicles. The demand for complex computational algorithms will only grow further.
There are plenty of other reasons to avoid using the cloud beyond complying with data privacy rules. Sending data to the cloud costs energy and latency. The ultimate for edge AI applications is to enable intelligent energy-efficient local processing.
Tempo aims to evaluate current solutions at device, architecture and application level, and build and expand the technology roadmap for European AI hardware platforms. The project will leverage MRAM (imec), FeRAM (Fraunhofer) and RRAM (CEA-Leti) memory to implement both spiking neural network (SNN) and deep neural network (DNN) accelerators for eight different use cases, ranging from consumer to automotive and medical applications.
In-memory computing architecture as highlighted at CEA-Leti in 2018 by Prof. Subhasish Mitra, Departments of Electrical Engineering and Computer Science at Stanford University. (Source: Professor Subhasish Mitra / Stanford University)
The director of the Fraunhofer Institute for Photonic Microsystems (IPMS) and chairman of the board of directors of the Fraunhofer Group Microelectronics, Prof. Hubert Lakner, said a key enabler for machine learning and pattern recognition is the capability of the algorithms to browse through large datasets. In terms of hardware this means having rapid access to large memory blocks. Therefore, one of the key focal areas of Tempo are energy efficient nonvolatile emerging memory technologies and novel ways to design and process memory and processing blocks on chip.
Emmanuel Sabonnadiere, CEO at CEA-Leti said they aimed to sweep technology options covering emerging memories and attempt to pair them with contemporary (DNN) and exploratory (SNN) neuromorphic computing paradigms. The process and design compatibility of each technology option will be assessed with respect to established integration practices and industrial partner roadmaps and needs to prepare the future market of edge AI “where Europe is well positioned with multiple disruptive technologies.”
Luc Van den hove, CEO at Imec, commented, “We are delighted to enter in such broad European collaboration effort on edge artificial intelligence, gathering the relevant stakeholders in Europe, including CEA-Leti and Fraunhofer, two of our most renowned colleague research centers in Europe. Thanks to our combined expertise, we can scan more potential routes forward than what would be possible by each of us individually, and as such, position Europe in the driver seat for R&D on AI.” He added that behind the scenes, they are already defining more public and bilateral agreements with several of the partners involved.
Tempo is a European innovation project funded by the ECSEL Joint Undertaking (JU), a public-private partnership for electronic components and systems which funds research, development and innovation projects in key enabling technologies. The JU receives support from the European Union’s Horizon 2020 research and innovation program, and from Belgium, France, Germany, the Netherlands, and Switzerland.
Tempo, which was officially kicked off in April 2019, will run for three years. The consortium consists of nineteen members, with Imec taking the lead as the sole Belgian consortium partner. The other consortium members are, for France: CEA-LETI, ST-Microelectronics Crolles, ST-Microelectronics Grenoble, Thales Alenia Space and Valeo. For Germany: Bosch, Fraunhofer EMFT, Fraunhofer IIS, Fraunhofer IPMS, Infineon, Innosent, TU Dresden and Videantis. For the Netherlands: imec the Netherlands, Philips Electronics and Philips Medical Systems. For Switzerland: aiCTX and the University of Zürich.
>> This article was originally published on our sister site, EE Times: "EU AI Will Rely on Memories."