Embedded ARM, MIPS, PowerPC cores get a 2X-4X speed boost - Embedded.com

Embedded ARM, MIPS, PowerPC cores get a 2X-4X speed boost

For embedded developers looking for a way to double system silicon performance that does not require still esoteric multithreaded and multicore designs, Intrinsity says it has the answer.

The company has just released RTL and ISA FastCore processor cores that yield two to four times the performance of ARM, MIPS and PowerPC cores than those implemented using ordinary synthesized static logic, using the same process.

According to Bob Russo, Intrinsity CEO, built using Intrinsity's proprietary Fast14 technology, the new RTL FastCore embedded cores are cycle-accurate, drop-in replacements that double the performance of existing embedded processor cores, while preserving the same application software and test infrastructure as the original core and occupying approximately the same silicon area.

“The processing requirements for gaming, networking, storage and other high-speed embedded applications are growing much faster than the performance increases afforded by scaling process technology,” he said. “Throughput demands are outstripping the performance of processors built using only static logic.”

Russo said studies made with several core architectures using popular processes indicate that RTL Fastcore embedded core implementations can yield double the performance of synthesized static versions in about the same silicon area.

Embedded core power consumption, he said, tracks linearly at twice the consumption at double the speed, thus preserving an equivalent MIPS/mW figure at speeds unattainable in synthesized static logic.

“The only alternatives for achieving this level of performance are licensing a new core with a more powerful architecture, using a multi-core implementation, or designing a full custom core,” said Russo. “Each option results in some combination of higher licensing fees, a substantially larger silicon area, and/or prohibitive NRE costs, All three options entail a major retooling of the software and test infrastructure.”

Since the RTL FastCore embedded cores are based on existing licensed RTL cores, there are no new licenses to buy. The same application software can be re-deployed virtually unchanged and they can be validated using the same test suite developed for the original core.

The secret of the increased speed of the cores, said Russo, is in the replacement of the static logic usually used to implement embedded cores with Intrinsity's domino logic where needed.

The cores achieve the performance boost through the implemenmtation of a variety of techniques including 1) low delay, low-skew multi-phase overlapping clocks to ease timing complexity, 2) automated device sizing to meet timing, noise immunity, EM/IR and power targets, 3) a non-binary numbering scheme (1-of-N) that reduces encode/decode logic overhead, helps isolate signal lines from any adjacent noise sources, and also minimizes power, and 4) automated cell construction that allows designers to focus on logic creation.

Intrinsity currently has both RTL and ISA FastCore embedded cores in development, the first versions of which it expects to announce during the second quarter of 2007. Subsequent cores will be announced as they near completion.

Intrinsity's RTL FastCore embedded cores are available to existing core licensees and do not require the licensing of new core architectures. Core vendors may also add FastCore implementations to their regular IP catalogs.

Intrinsity charges a nominal NRE fee and an incremental royalty on sales of FastCore-based processors. FastCore costs are typically lower than the cost of a new license, and are also lower than the multiple royalties needed for many multicore implementations.

Intrinsity, Inc., Austin, Texas, +1 970.949.6480, www.intrinsity.com.

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