Embedded.com Tech Focus Newsletter (7-25-11): Hardware languages - Embedded.com

Embedded.com Tech Focus Newsletter (7-25-11): Hardware languages

Embedded Newsletter for 07-25-11

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July 25, 2011

Tech Focus: Hardware languages for softies


A guide to VHDL for embedded software developers: Part 1 – Essential commands

Using SystemC to build a system-on-chip platform

The four Rs of efficient system design

Compiling software to gates

Editor's Note

Bernard Cole Bernard Cole
Site Editor

Every once in a while I find myself caught in the crossfire of debates between embedded systems developers about the pros and cons of C versus C++, C/C++ versus Java, or model-driven versus model-based software design frameworks. At those times I try to remember the advice of Embedded.com columnists Jack Ganssle and Michael Barr: there are no good languages or bad ones, just imperfect languages that may be more or less suitable to the task at hand.

One area where such advice should also be heeded is where the dichotomy is the widest. That is the one between developers using languages such as C or C++ to write software programs to run on microprocessors and those who use hardware design languages to build the actual gates and logic for the CPU, ASIC or FPGA hardware.

This is ironic because, in an effort to make hardware design easier for both hardware and software designers, the industry has borrowed heavily from software languages. The original VHDL for ASICs and FPGAs borrows heavily from Ada, Verilog is based on C, SystemC borrows heavily from C++, and Handel-C uses a rich subset of C. There is even a hardware language based on Java, called Lava , and another called MyHDL which used the Python Web programming language to generate either Verilog or VHDL descriptions.

So when you get right down to it even the hardware is software and developers in both worlds face the same sets of challenges: writing the code, compiling, debugging, simulating and verifying it. And, now, there are frameworks such as ESL , which abstract the design process to the system level.

In this issue of the Tech Focus newsletter is a selection of articles written over the past few years to help reluctant software developers make the transition. Of these, my Editor’s Top Picks are:

A guide to VHDL for software developers
Design languages for embedded system s
Transitioning from C/C++ to SystemC

With the emergence of such things as FPGAs with integrated CPU cores and processors with FPGA blocks, the boundary between hardware and software will become even more indistinct. This makes it more important than ever to have the skills to move back and forth as easily as possible.

Design How-Tos

A guide to VHDL for embedded software developers: Part 1 – Essential commands

A series of three articles for embedded software developers unfamiliar with VHDL that is designed to give concise and useful summary information on important language constructs and usage – helpful and easy to use, but not necessarily complete. Part 1: Essential commands.

Using SystemC to build a system-on-chip platform

How Texas Instruments' designers used the SystemC hardware design language to do performance modeling when creating both the company's OMAP-2 platform and the devices based on it.

Transitioning from C/C++ to SystemC in high-level design

It's far easier to do architecture design in SystemC than it is to do it in C and C++. If co-designing hardware and software using high-level design methods, much of your work will be done in an architecture design phase in SystemC. Here's why.

Design Languages for Embedded Systems

Synopsys' Stephen A. Edwards provides a short tutorial on the basics of some of the most important languages, along with examples of each, that will help you decide which one to investigate for your particular embedded application.

Accelerating algorithms in hardware

When you're trying to get the best performance out of your algorithm and you're out of software tricks, try acceleration through hardware/software repartitioning. FPGAs provide everything you need to speed up your algorithms. Lara Simsic shows you how.

Compiling software to gates

Are VHDL and Verilog past their prime, soon to be replaced by C-like design languages such as System C, Handel-C, and others? Professor Ian Page thinks a change is at hand.

The four Rs of efficient system design

New design languages and new chips and systems mean a whole new set of design gotchas for today's developers. Once-simple tasks become difficult and, thankfully, once-difficult tasks become easy. This article for senior designers looks at newer high-level design techniques and how they can improve logic and system design.

Taking System Design to a Higher Level

Keys to raising the design level are the availability of different design methodologies coupled with design tools that can navigate designs at abstraction levels above RTL.

FPGA programming step by step

FPGAs and microprocessors are more similar than you may think. Here's a primer on how to program an FPGA and some reasons why you'd want to.

The art of FPGA construction

Working with FPGAs isn't intimidating when you know the basic techniques and options.

Hardware Design Requires Hardware Design Languages

While languages such as C++ can help in the creation of high-level models of hardware, Sean Dart argues that hardware engineers need specific language constructs in languages such as SystemC that allow them to express their intent in the most accurate and productive manner.

Accellera VHDL Standard

The article describes the salient features of the Accellera VHDL STandard 1076-2006-D3.0

An overview of SystemVerilog 3.1

SystemVerilog 3.1 adds a number of features to the Verilog-2001 standard that facilitate modeling and verification of large systems. In this tutorial, consultant Stu Sutherland provides an overview of some of the more significant new features, and argues that SystemVerilog is ready for adoption and use.

Address system-level HW/SW design tasks with Electronic System Level tools

To keep track of design size and complexity, designers are now looking for the next breakthrough in design productivity, implementation and verification. One answer may be electronic system level design.

Embedded Systems Bookshelf


Embedded Books Reading Room
Bernard Cole's favorite links to book excerpts.


Engineer's Bookshelf
Airport fiction blows. A look at books other engineers are reading and why you should read them, too. Recommend and write a review yourself. E-mail Brian Fuller.

Jack Ganssle's Bookshelf
A list of book reviews by Jack Ganssle, contributing technical editor of Embedded Systems Design and Embedded.com.

Max's Cool Beans
Clive “Max” Maxfield, the editor on Programmable Logic DesignLine, often writes about interesting books.


Mentor extends embedded design into ESL

Common Embedded Software Development Platform integrates electronic system level (ESL) capabilities into CodeSourcery tools to support development from virtual prototypes to hardware emulation and boards.

New ESL platform claimed to cut design times in half

Agilent Technologies' new electronic system-level (ESL) EDA platform is said to help algorithm developers and system architects cut design time in half.

CoFluent bridges gap from UML to SystemC

French ESL company CoFluent Design (Nantes, France) claimed it has developed a methodology that combines the OMG's (Object Management Group) standards UML (Unified Modeling Language), SysML (System Modeling Language) and MARTE (Modeling and Analysis for Real-Time and Embedded Systems) profiles.

SystemC synthesis tool adds improved C++ support

Celoxica Holdings said it has enhanced C++ coding support in its Agility Compiler high-level design tool, raising the level of design abstraction above SystemC for designers who need to boost productivity and for programmers less familiar with hardware design.

C/C++ to VHDL for $995

Will C/C++ become a standard for modelling hardware and software systems?

HDL Designer Series Supports SystemVerilog

Mentor Graphics Corporation announced that its HDL Designer Series product has been extended to provide a platform for implementing SystemVerilog.

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